From 3fff6023602822531efdae30bc8ebf862967f1ef Mon Sep 17 00:00:00 2001 From: Friedrich Beckmann Date: Mon, 25 Jul 2022 17:55:39 +0200 Subject: Initial Commit --- .../scala/vexriscv/plugin/NoPipeliningPlugin.scala | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 VexRiscv/src/main/scala/vexriscv/plugin/NoPipeliningPlugin.scala (limited to 'VexRiscv/src/main/scala/vexriscv/plugin/NoPipeliningPlugin.scala') diff --git a/VexRiscv/src/main/scala/vexriscv/plugin/NoPipeliningPlugin.scala b/VexRiscv/src/main/scala/vexriscv/plugin/NoPipeliningPlugin.scala new file mode 100644 index 0000000..b4ad22b --- /dev/null +++ b/VexRiscv/src/main/scala/vexriscv/plugin/NoPipeliningPlugin.scala @@ -0,0 +1,23 @@ +package vexriscv.plugin + +import spinal.core._ +import spinal.lib._ +import vexriscv._ + + +class NoPipeliningPlugin() extends Plugin[VexRiscv] { + + override def setup(pipeline: VexRiscv): Unit = { + import pipeline.config._ + val decoderService = pipeline.service(classOf[DecoderService]) + decoderService.addDefault(HAS_SIDE_EFFECT, False) + } + + override def build(pipeline: VexRiscv): Unit = { + import pipeline._ + import pipeline.config._ + + val writesInPipeline = stages.dropWhile(_ != execute).map(s => s.arbitration.isValid && s.input(REGFILE_WRITE_VALID)) :+ RegNext(stages.last.arbitration.isValid && stages.last.input(REGFILE_WRITE_VALID)) + decode.arbitration.haltByOther.setWhen(stagesFromExecute.map(_.arbitration.isValid).orR) + } +} -- cgit v1.2.3