From 3fff6023602822531efdae30bc8ebf862967f1ef Mon Sep 17 00:00:00 2001 From: Friedrich Beckmann Date: Mon, 25 Jul 2022 17:55:39 +0200 Subject: Initial Commit --- VexRiscvSocSoftware/projects/briey/uart/src/main.c | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100755 VexRiscvSocSoftware/projects/briey/uart/src/main.c (limited to 'VexRiscvSocSoftware/projects/briey/uart/src/main.c') diff --git a/VexRiscvSocSoftware/projects/briey/uart/src/main.c b/VexRiscvSocSoftware/projects/briey/uart/src/main.c new file mode 100755 index 0000000..d1fbe17 --- /dev/null +++ b/VexRiscvSocSoftware/projects/briey/uart/src/main.c @@ -0,0 +1,39 @@ +#include +#include +#include +#include +#include + +void print(char *str){ + while(*str){ + uart_write(UART,*(str++)); + } +} + +int main() { + Uart_Config uartConfig; + uartConfig.dataLength = 8; + uartConfig.parity = NONE; + uartConfig.stop = ONE; + uartConfig.clockDivider = 50000000/8/115200-1; + uart_applyConfig(UART,&uartConfig); + + print("Hello !\n"); + + while(1){ + for(uint32_t idx = '0';idx <= '9';idx++){ + uart_write(UART, idx); + } + for(uint32_t idx = 'a';idx <= 'z';idx++){ + uart_write(UART, idx); + } + for(uint32_t idx = 'A';idx <= 'Z';idx++){ + uart_write(UART, idx); + } + } +} + + +void irqCallback(){ + +} -- cgit v1.2.3