From 3fff6023602822531efdae30bc8ebf862967f1ef Mon Sep 17 00:00:00 2001 From: Friedrich Beckmann Date: Mon, 25 Jul 2022 17:55:39 +0200 Subject: Initial Commit --- scripts/de1_pin_assignments_minimumio.csv | 282 ++++++++++++++++++++++++++++++ 1 file changed, 282 insertions(+) create mode 100644 scripts/de1_pin_assignments_minimumio.csv (limited to 'scripts/de1_pin_assignments_minimumio.csv') diff --git a/scripts/de1_pin_assignments_minimumio.csv b/scripts/de1_pin_assignments_minimumio.csv new file mode 100644 index 0000000..97cfcd8 --- /dev/null +++ b/scripts/de1_pin_assignments_minimumio.csv @@ -0,0 +1,282 @@ +# This are all pin location assignments derived from the CDROM file +# Friedrich Beckmann, 27.3.2014 + +To,Location +GPIO_0[0],PIN_A13 +GPIO_0[1],PIN_B13 +GPIO_0[2],PIN_A14 +GPIO_0[3],PIN_B14 +GPIO_0[4],PIN_A15 +GPIO_0[5],PIN_B15 +GPIO_0[6],PIN_A16 +GPIO_0[7],PIN_B16 +GPIO_0[8],PIN_A17 +GPIO_0[9],PIN_B17 +GPIO_0[10],PIN_A18 +GPIO_0[11],PIN_B18 +GPIO_0[12],PIN_A19 +GPIO_0[13],PIN_B19 +GPIO_0[14],PIN_A20 +GPIO_0[15],PIN_B20 +GPIO_0[16],PIN_C21 +GPIO_0[17],PIN_C22 +GPIO_0[18],PIN_D21 +GPIO_0[19],PIN_D22 +GPIO_0[20],PIN_E21 +GPIO_0[21],PIN_E22 +GPIO_0[22],PIN_F21 +GPIO_0[23],PIN_F22 +GPIO_0[24],PIN_G21 +GPIO_0[25],PIN_G22 +GPIO_0[26],PIN_J21 +GPIO_0[27],PIN_J22 +GPIO_0[28],PIN_K21 +GPIO_0[29],PIN_K22 +GPIO_0[30],PIN_J19 +GPIO_0[31],PIN_J20 +GPIO_0[32],PIN_J18 +GPIO_0[33],PIN_K20 +GPIO_0[34],PIN_L19 +GPIO_0[35],PIN_L18 +GPIO_1[0],PIN_H12 +GPIO_1[1],PIN_H13 +GPIO_1[2],PIN_H14 +GPIO_1[3],PIN_G15 +GPIO_1[4],PIN_E14 +GPIO_1[5],PIN_E15 +GPIO_1[6],PIN_F15 +GPIO_1[7],PIN_G16 +GPIO_1[8],PIN_F12 +GPIO_1[9],PIN_F13 +GPIO_1[10],PIN_C14 +GPIO_1[11],PIN_D14 +GPIO_1[12],PIN_D15 +GPIO_1[13],PIN_D16 +GPIO_1[14],PIN_C17 +GPIO_1[15],PIN_C18 +GPIO_1[16],PIN_C19 +GPIO_1[17],PIN_C20 +GPIO_1[18],PIN_D19 +GPIO_1[19],PIN_D20 +GPIO_1[20],PIN_E20 +GPIO_1[21],PIN_F20 +GPIO_1[22],PIN_E19 +GPIO_1[23],PIN_E18 +GPIO_1[24],PIN_G20 +GPIO_1[25],PIN_G18 +GPIO_1[26],PIN_G17 +GPIO_1[27],PIN_H17 +GPIO_1[28],PIN_J15 +GPIO_1[29],PIN_H18 +GPIO_1[30],PIN_N22 +GPIO_1[31],PIN_N21 +GPIO_1[32],PIN_P15 +GPIO_1[33],PIN_N15 +GPIO_1[34],PIN_P17 +GPIO_1[35],PIN_P18 +SW[0],PIN_L22 +SW[1],PIN_L21 +SW[2],PIN_M22 +SW[3],PIN_V12 +SW[4],PIN_W12 +SW[5],PIN_U12 +SW[6],PIN_U11 +SW[7],PIN_M2 +SW[8],PIN_M1 +SW[9],PIN_L2 +HEX0[0],PIN_J2 +HEX0[1],PIN_J1 +HEX0[2],PIN_H2 +HEX0[3],PIN_H1 +HEX0[4],PIN_F2 +HEX0[5],PIN_F1 +HEX0[6],PIN_E2 +HEX1[0],PIN_E1 +HEX1[1],PIN_H6 +HEX1[2],PIN_H5 +HEX1[3],PIN_H4 +HEX1[4],PIN_G3 +HEX1[5],PIN_D2 +HEX1[6],PIN_D1 +HEX2[0],PIN_G5 +HEX2[1],PIN_G6 +HEX2[2],PIN_C2 +HEX2[3],PIN_C1 +HEX2[4],PIN_E3 +HEX2[5],PIN_E4 +HEX2[6],PIN_D3 +HEX3[0],PIN_F4 +HEX3[1],PIN_D5 +HEX3[2],PIN_D6 +HEX3[3],PIN_J4 +HEX3[4],PIN_L8 +HEX3[5],PIN_F3 +HEX3[6],PIN_D4 +KEY[0],PIN_R22 +KEY[1],PIN_R21 +KEY[2],PIN_T22 +KEY[3],PIN_T21 +LEDR[0],PIN_R20 +LEDR[1],PIN_R19 +LEDR[2],PIN_U19 +LEDR[3],PIN_Y19 +LEDR[4],PIN_T18 +LEDR[5],PIN_V19 +LEDR[6],PIN_Y18 +LEDR[7],PIN_U18 +LEDR[8],PIN_R18 +LEDR[9],PIN_R17 +LEDG[0],PIN_U22 +LEDG[1],PIN_U21 +LEDG[2],PIN_V22 +LEDG[3],PIN_V21 +LEDG[4],PIN_W22 +LEDG[5],PIN_W21 +LEDG[6],PIN_Y22 +LEDG[7],PIN_Y21 +CLOCK_27[0],PIN_D12 +CLOCK_27[1],PIN_E12 +CLOCK_24[0],PIN_B12 +CLOCK_24[1],PIN_A12 +CLOCK_50,PIN_L1 +EXT_CLOCK,PIN_M21 +PS2_CLK,PIN_H15 +PS2_DAT,PIN_J14 +UART_RXD,PIN_F14 +UART_TXD,PIN_G12 +TDI,PIN_E8 +TCS,PIN_D8 +TCK,PIN_C7 +TDO,PIN_D7 +VGA_R[0],PIN_D9 +VGA_R[1],PIN_C9 +VGA_R[2],PIN_A7 +VGA_R[3],PIN_B7 +VGA_G[0],PIN_B8 +VGA_G[1],PIN_C10 +VGA_G[2],PIN_B9 +VGA_G[3],PIN_A8 +VGA_B[0],PIN_A9 +VGA_B[1],PIN_D11 +VGA_B[2],PIN_A10 +VGA_B[3],PIN_B10 +VGA_HS,PIN_A11 +VGA_VS,PIN_B11 +I2C_SCLK,PIN_A3 +I2C_SDAT,PIN_B3 +AUD_ADCLRCK,PIN_A6 +AUD_ADCDAT,PIN_B6 +AUD_DACLRCK,PIN_A5 +AUD_DACDAT,PIN_B5 +AUD_XCK,PIN_B4 +AUD_BCLK,PIN_A4 +DRAM_ADDR[0],PIN_W4 +DRAM_ADDR[1],PIN_W5 +DRAM_ADDR[2],PIN_Y3 +DRAM_ADDR[3],PIN_Y4 +DRAM_ADDR[4],PIN_R6 +DRAM_ADDR[5],PIN_R5 +DRAM_ADDR[6],PIN_P6 +DRAM_ADDR[7],PIN_P5 +DRAM_ADDR[8],PIN_P3 +DRAM_ADDR[9],PIN_N4 +DRAM_ADDR[10],PIN_W3 +DRAM_ADDR[11],PIN_N6 +DRAM_BA_0,PIN_U3 +DRAM_BA_1,PIN_V4 +DRAM_CAS_N,PIN_T3 +DRAM_CKE,PIN_N3 +DRAM_CLK,PIN_U4 +DRAM_CS_N,PIN_T6 +DRAM_DQ[0],PIN_U1 +DRAM_DQ[1],PIN_U2 +DRAM_DQ[2],PIN_V1 +DRAM_DQ[3],PIN_V2 +DRAM_DQ[4],PIN_W1 +DRAM_DQ[5],PIN_W2 +DRAM_DQ[6],PIN_Y1 +DRAM_DQ[7],PIN_Y2 +DRAM_DQ[8],PIN_N1 +DRAM_DQ[9],PIN_N2 +DRAM_DQ[10],PIN_P1 +DRAM_DQ[11],PIN_P2 +DRAM_DQ[12],PIN_R1 +DRAM_DQ[13],PIN_R2 +DRAM_DQ[14],PIN_T1 +DRAM_DQ[15],PIN_T2 +DRAM_LDQM,PIN_R7 +DRAM_RAS_N,PIN_T5 +DRAM_UDQM,PIN_M5 +DRAM_WE_N,PIN_R8 +FL_ADDR[0],PIN_AB20 +FL_ADDR[1],PIN_AA14 +FL_ADDR[2],PIN_Y16 +FL_ADDR[3],PIN_R15 +FL_ADDR[4],PIN_T15 +FL_ADDR[5],PIN_U15 +FL_ADDR[6],PIN_V15 +FL_ADDR[7],PIN_W15 +FL_ADDR[8],PIN_R14 +FL_ADDR[9],PIN_Y13 +FL_ADDR[10],PIN_R12 +FL_ADDR[11],PIN_T12 +FL_ADDR[12],PIN_AB14 +FL_ADDR[13],PIN_AA13 +FL_ADDR[14],PIN_AB13 +FL_ADDR[15],PIN_AA12 +FL_ADDR[16],PIN_AB12 +FL_ADDR[17],PIN_AA20 +FL_ADDR[18],PIN_U14 +FL_ADDR[19],PIN_V14 +FL_ADDR[20],PIN_U13 +FL_ADDR[21],PIN_R13 +FL_DQ[0],PIN_AB16 +FL_DQ[1],PIN_AA16 +FL_DQ[2],PIN_AB17 +FL_DQ[3],PIN_AA17 +FL_DQ[4],PIN_AB18 +FL_DQ[5],PIN_AA18 +FL_DQ[6],PIN_AB19 +FL_DQ[7],PIN_AA19 +FL_OE_N,PIN_AA15 +FL_RST_N,PIN_W14 +FL_WE_N,PIN_Y14 +SRAM_ADDR[0],PIN_AA3 +SRAM_ADDR[1],PIN_AB3 +SRAM_ADDR[2],PIN_AA4 +SRAM_ADDR[3],PIN_AB4 +SRAM_ADDR[4],PIN_AA5 +SRAM_ADDR[5],PIN_AB10 +SRAM_ADDR[6],PIN_AA11 +SRAM_ADDR[7],PIN_AB11 +SRAM_ADDR[8],PIN_V11 +SRAM_ADDR[9],PIN_W11 +SRAM_ADDR[10],PIN_R11 +SRAM_ADDR[11],PIN_T11 +SRAM_ADDR[12],PIN_Y10 +SRAM_ADDR[13],PIN_U10 +SRAM_ADDR[14],PIN_R10 +SRAM_ADDR[15],PIN_T7 +SRAM_ADDR[16],PIN_Y6 +SRAM_ADDR[17],PIN_Y5 +SRAM_CE_N,PIN_AB5 +SRAM_DQ[0],PIN_AA6 +SRAM_DQ[1],PIN_AB6 +SRAM_DQ[2],PIN_AA7 +SRAM_DQ[3],PIN_AB7 +SRAM_DQ[4],PIN_AA8 +SRAM_DQ[5],PIN_AB8 +SRAM_DQ[6],PIN_AA9 +SRAM_DQ[7],PIN_AB9 +SRAM_DQ[8],PIN_Y9 +SRAM_DQ[9],PIN_W9 +SRAM_DQ[10],PIN_V9 +SRAM_DQ[11],PIN_U9 +SRAM_DQ[12],PIN_R9 +SRAM_DQ[13],PIN_W8 +SRAM_DQ[14],PIN_V8 +SRAM_DQ[15],PIN_U8 +SRAM_LB_N,PIN_Y7 +SRAM_OE_N,PIN_T8 +SRAM_UB_N,PIN_W7 +SRAM_WE_N,PIN_AA10 -- cgit v1.2.3