beckmanf/dtlab.git/sim, branch master Unnamed repository; edit this file 'description' to name the repository. add uart_rx_edge 2024-05-28T10:20:02+00:00 Friedrich Beckmann friedrich.beckmann@hs-augsburg.de 2024-05-28T10:20:02+00:00 aa054291a7f4eaf136d228d851354bd879fd8fe1 






uart rx
2024-05-27T19:04:01+00:00

Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de

2024-05-27T15:32:24+00:00

f780458e75d1e22742a091e8e9cf89009e91ee8a












sim/makefile: added synth step to sim
2024-05-15T04:43:58+00:00

Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de

2024-05-15T04:43:58+00:00

8c6f69e2fead5f85b8098bca6c1c4606676a880e

The --synth step finds std_ulogic violations with
several drivers





The --synth step finds std_ulogic violations with
several drivers







add top_uart
2024-05-14T14:21:25+00:00

Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de

2024-05-14T14:21:25+00:00

1b09cc725908bbec8ec2e416ebeb09d8a84ac2a6












add pwm
2024-05-10T11:49:52+00:00

Friedrich Beckmann
friedrich.beckmann@tha.de

2024-05-10T11:49:52+00:00

25ed296488cd6d9dca9b93ec5ecf76966da1131b












add top_count
2024-05-10T10:28:38+00:00

Friedrich Beckmann
friedrich.beckmann@tha.de

2024-05-10T10:28:38+00:00

bc7d43b160864d53e7e4bbea81b29d5e8903baf4












sim: make the output of the make command more verbose
2024-04-28T11:13:53+00:00

Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de

2024-04-28T11:13:53+00:00

ee8d484d8531e425a06f23519fc09bbf2e1acf4e

Hans dumped all ghdl output to a logfile to have a short output
on the terminal. I prefer to have a more verbose output in case of
errors. In addition I fixed a problem when an error occurs during
elaboration as the .ghw file is produced also when ghdl exits with
an error. Now make will reproduce the error on each call.





Hans dumped all ghdl output to a logfile to have a short output
on the terminal. I prefer to have a more verbose output in case of
errors. In addition I fixed a problem when an error occurs during
elaboration as the .ghw file is produced also when ghdl exits with
an error. Now make will reproduce the error on each call.







top_shift: add edge.vhd and ringcnt.vhd as empty modules
2024-04-28T11:11:57+00:00

Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de

2024-04-28T11:11:57+00:00

d4e117939818af4ed0e148f6352a81c19fa4631c












add top_shift and simulation
2024-03-07T11:26:41+00:00

Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de

2024-03-07T11:26:41+00:00

e96efbe9496c8f9718869791fa30e444f42ffb38