beckmanf/dtlab.git/sim, branch solutions
Unnamed repository; edit this file 'description' to name the repository.
https://caeis.etech.fh-augsburg.de/beckmanf/dtlab.git/atom?h=solutions
2024-05-28T10:31:52Z
uart rx solution
2024-05-28T10:31:52Z
Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de
2024-05-27T15:32:24Z
urn:sha1:2caa12d7f849d5bb5aebed5f306f2def408ae8e3
top_uart solutions
2024-05-28T10:22:40Z
Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de
2024-05-15T04:47:25Z
urn:sha1:3dd4ccf8e17309ed97e5bdbd8cff6a2855d284fa
add top_count solutions
2024-05-28T10:22:40Z
Friedrich Beckmann
friedrich.beckmann@tha.de
2024-05-10T17:08:32Z
urn:sha1:c6ee080fc68079392e9e66961bd11ebf52ab852d
add ringcnt to top_shift
2024-05-28T10:22:40Z
Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de
2024-04-28T16:17:55Z
urn:sha1:6b51b0420ed86e9ee8298d6b52781521de6e0476
add uart_rx_edge
2024-05-28T10:20:02Z
Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de
2024-05-28T10:20:02Z
urn:sha1:aa054291a7f4eaf136d228d851354bd879fd8fe1
uart rx
2024-05-27T19:04:01Z
Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de
2024-05-27T15:32:24Z
urn:sha1:f780458e75d1e22742a091e8e9cf89009e91ee8a
sim/makefile: added synth step to sim
2024-05-15T04:43:58Z
Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de
2024-05-15T04:43:58Z
urn:sha1:8c6f69e2fead5f85b8098bca6c1c4606676a880e
The --synth step finds std_ulogic violations with
several drivers
add top_uart
2024-05-14T14:21:25Z
Friedrich Beckmann
friedrich.beckmann@hs-augsburg.de
2024-05-14T14:21:25Z
urn:sha1:1b09cc725908bbec8ec2e416ebeb09d8a84ac2a6
add pwm
2024-05-10T11:49:52Z
Friedrich Beckmann
friedrich.beckmann@tha.de
2024-05-10T11:49:52Z
urn:sha1:25ed296488cd6d9dca9b93ec5ecf76966da1131b
add top_count
2024-05-10T10:28:38Z
Friedrich Beckmann
friedrich.beckmann@tha.de
2024-05-10T10:28:38Z
urn:sha1:bc7d43b160864d53e7e4bbea81b29d5e8903baf4