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authorFriedrich Beckmann <friedrich.beckmann@hs-augsburg.de>2024-05-27 17:32:24 +0200
committerFriedrich Beckmann <friedrich.beckmann@hs-augsburg.de>2024-05-27 21:04:01 +0200
commitf780458e75d1e22742a091e8e9cf89009e91ee8a (patch)
tree1c344369707a3a43374434dc47d153b9b8492749 /src/uart_rx_shift.vhd
parent8c6f69e2fead5f85b8098bca6c1c4606676a880e (diff)
uart rx
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+library ieee;
+use ieee.std_logic_1164.all;
+
+entity uart_rx_shift is
+ port (
+ clk : in std_ulogic;
+ rst_n : in std_ulogic;
+ shift_i : in std_ulogic;
+ ser_i : in std_ulogic;
+ d_o : out std_ulogic_vector(7 downto 0));
+end entity;
+
+architecture rtl of uart_rx_shift is
+begin
+end architecture rtl;
+