From c6ee080fc68079392e9e66961bd11ebf52ab852d Mon Sep 17 00:00:00 2001 From: Friedrich Beckmann Date: Fri, 10 May 2024 19:08:32 +0200 Subject: add top_count solutions --- src/t_top_count.vhd | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) (limited to 'src/t_top_count.vhd') diff --git a/src/t_top_count.vhd b/src/t_top_count.vhd index 0372a94..ca16d20 100644 --- a/src/t_top_count.vhd +++ b/src/t_top_count.vhd @@ -9,7 +9,6 @@ architecture beh of t_top_count is signal sim_clk : std_ulogic; signal sim_rst_n : std_ulogic; signal sim_x : std_ulogic; - signal sim_y : std_ulogic; signal sim_sw : std_ulogic_vector(9 downto 0); signal sim_key : std_ulogic_vector(3 downto 0); @@ -40,16 +39,11 @@ begin -- Stimuli key push stim_p : process begin - sim_x <= '0'; - wait until rising_edge(sim_rst_n); - for i in 0 to 5 loop - wait until falling_edge(sim_clk); - end loop; sim_x <= '1'; - wait until falling_edge(sim_clk); - wait until falling_edge(sim_clk); + wait until rising_edge(sim_rst_n); + wait for 2000 ns; sim_x <= '0'; - wait for 200 ns; + wait for 2000 ns; simstop <= true; wait; end process ; @@ -70,6 +64,6 @@ begin sim_key(0) <= sim_rst_n; sim_key(1) <= sim_x; sim_key(3 downto 2) <= "00"; - sim_sw <= "1010000001"; + sim_sw <= "1010000100"; end architecture beh; \ No newline at end of file -- cgit v1.2.3