From 70f4b9e97d88ade1dc262d930edd27ef97de58ae Mon Sep 17 00:00:00 2001 From: Friedrich Beckmann Date: Sun, 28 Apr 2024 17:49:04 +0200 Subject: moved edgedetection to edge module, 6 clock design --- src/t_top_shift.vhd | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) (limited to 'src/t_top_shift.vhd') diff --git a/src/t_top_shift.vhd b/src/t_top_shift.vhd index ddf76a1..e789c85 100644 --- a/src/t_top_shift.vhd +++ b/src/t_top_shift.vhd @@ -45,10 +45,17 @@ begin wait until falling_edge(sim_clk); end loop; sim_x <= '1'; - wait until falling_edge(sim_clk); - wait until falling_edge(sim_clk); + wait for 100 ns; sim_x <= '0'; - wait for 200 ns; + wait for 40 ns; + sim_x <= '1'; + wait for 100 ns; + sim_x <= '0'; + wait for 100 ns; + sim_x <= '1'; + wait for 40 ns; + sim_x <= '0'; + wait for 100 ns; simstop <= true; wait; end process ; -- cgit v1.2.3