From c6ee080fc68079392e9e66961bd11ebf52ab852d Mon Sep 17 00:00:00 2001 From: Friedrich Beckmann Date: Fri, 10 May 2024 19:08:32 +0200 Subject: add top_count solutions --- src/top_count.vhd | 40 ++++++++++++++++++++++++++++++++++------ 1 file changed, 34 insertions(+), 6 deletions(-) (limited to 'src/top_count.vhd') diff --git a/src/top_count.vhd b/src/top_count.vhd index 0a84349..ff25d1e 100644 --- a/src/top_count.vhd +++ b/src/top_count.vhd @@ -24,10 +24,38 @@ begin rst_n <= KEY(0); x <= KEY(1); - cnt <= "0000"; - en <= '0'; - pwm <= '0'; - + cnt1sec_inst: entity work.cnt1sec + port map( + clk => clk, + rst_n => rst_n, + en_o => en + ); + + ringcnt_inst: entity work.ringcnt + port map( + clk => clk, + rst_n => rst_n, + en_i => en, + y_o => LEDR + ); + + cntm13_inst: entity work.cntm13 + port map( + clk => clk, + rst_n => rst_n, + up_i => x, + en_i => en, + cnt_o => cnt + ); + + pwm_inst: entity work.pwm + port map( + clk => clk, + rst_n => rst_n, + ctrl_i => SW(3 downto 0), + pwm_o => pwm + ); + bin2seg_inst: entity work.bin2seg port map( bin_i => cnt, @@ -40,7 +68,7 @@ begin 2 => pwm, 1 => rst_n, 0 => clk); - LEDR <= SW; - LEDG <= KEY; + LEDG(3) <= pwm; + LEDG(2 downto 0) <= KEY(2 downto 0); end architecture rtl; \ No newline at end of file -- cgit v1.2.3