beckmanf/mengcom.git/src, branch masterUnnamed repository; edit this file 'description' to name the repository.
add de1_dac2025-03-18T13:07:33+00:00Friedrich Beckmannfriedrich.beckmann@hs-augsburg.de2025-03-18T13:07:33+00:002c9c738d217c80a235c82f830a72223e07c9c4d5
added de1_sine sinewave generator for ADC/DAC board2023-03-15T21:30:08+00:00Friedrich Beckmannfriedrich.beckmann@hs-augsburg.de2023-03-15T21:30:08+00:00df418208aa0570a99f6ab6657d54ee65d6162168
I added a sinewave generator based on DDS in VHDL to
generate a sinewave with the ADC/DAC board. This can
be used to demonstrate the Aliasing Lowpass filter.
I added a sinewave generator based on DDS in VHDL to
generate a sinewave with the ADC/DAC board. This can
be used to demonstrate the Aliasing Lowpass filter.
Created stub for DDS test with ADDA-board using Simulink flow2022-06-15T15:31:01+00:00Matthias Kamufmatthias.kamuf@hs-augsburg.de2022-06-15T15:31:01+00:00941aeaad5be56c905b4f38f3d07b0a0cbc1bd07f
add / update de1_sta code2022-05-16T16:40:52+00:00Friedrich Beckmannfriedrich.beckmann@hs-augsburg.de2022-05-16T16:40:52+00:00fda13db347b69d24b7327a5b48cd2af7abfc6408
I modified the de1_sta demo code and added a testbench.
I modified the de1_sta demo code and added a testbench.
Added FIR design files for DE1 top level2022-05-16T14:46:04+00:00Matthias Kamufmatthias.kamuf@hs-augsburg.de2022-05-16T14:46:04+00:009b7fdebd9319e3e6560ff5b3a7ad750a6957a1da
Added source files for simple FIR filter2022-05-04T12:56:11+00:00Matthias Kamufmatthias.kamuf@hs-augsburg.de2022-05-04T12:56:11+00:001d5a8634e3a54bbcd2e6ac3074e6c38f085feef0
added t_and2gate.vhd and de1_and2gate_structure.vhd2022-03-16T11:18:05+00:00Johann Faerberjohann.faerber@hs-augsburg.de2022-03-16T11:18:05+00:00f37b864e1b943984739931b0950c45c6f705c679
deleted equation within invgate_equation.vhd2022-03-13T14:14:37+00:00Johann Faerberjohann.faerber@hs-augsburg.de2022-03-13T14:14:37+00:00f48e8a6dce1613cba40e3e94d02b00875e8297d2