From fda13db347b69d24b7327a5b48cd2af7abfc6408 Mon Sep 17 00:00:00 2001
From: Friedrich Beckmann <friedrich.beckmann@hs-augsburg.de>
Date: Mon, 16 May 2022 18:40:52 +0200
Subject: add / update de1_sta code

I modified the de1_sta demo code and added a testbench.
---
 pnr/de1_sta/makefile | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
 create mode 100644 pnr/de1_sta/makefile

(limited to 'pnr/de1_sta/makefile')

diff --git a/pnr/de1_sta/makefile b/pnr/de1_sta/makefile
new file mode 100644
index 0000000..5b83d32
--- /dev/null
+++ b/pnr/de1_sta/makefile
@@ -0,0 +1,14 @@
+SIM_PROJECT_NAME = de1_sta
+PROJECT = $(SIM_PROJECT_NAME)
+
+# Here the VHDL files for synthesis are defined. 
+include ../../sim/$(SIM_PROJECT_NAME)/makefile.sources
+
+# Add the toplevel fpga vhdl file
+SOURCE_FILES = $(SYN_SOURCE_FILES)
+
+FAMILY = "Cyclone II"
+DEVICE = EP2C20F484C7
+PROGFILEEXT = sof
+
+include ../makefile
-- 
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