From a04bbf15b0f51696894e37f3e566998108aefd74 Mon Sep 17 00:00:00 2001 From: Johann Faerber Date: Wed, 9 Mar 2022 09:48:43 +0100 Subject: added basic design directory structure --- pnr/de1_tone/de1_tone_pins.tcl | 33 +++++++++++++++++++++++++++++++++ pnr/de1_tone/makefile | 14 ++++++++++++++ 2 files changed, 47 insertions(+) create mode 100644 pnr/de1_tone/de1_tone_pins.tcl create mode 100644 pnr/de1_tone/makefile (limited to 'pnr/de1_tone') diff --git a/pnr/de1_tone/de1_tone_pins.tcl b/pnr/de1_tone/de1_tone_pins.tcl new file mode 100644 index 0000000..e9c32ae --- /dev/null +++ b/pnr/de1_tone/de1_tone_pins.tcl @@ -0,0 +1,33 @@ +# Pin Configuration +set_location_assignment PIN_L1 -to CLOCK_50 +set_location_assignment PIN_R22 -to KEY0 +set_location_assignment PIN_A3 -to I2C_SCLK +set_location_assignment PIN_B3 -to I2C_SDAT +set_location_assignment PIN_A6 -to AUD_ADCLRCK +set_location_assignment PIN_B6 -to AUD_ADCDAT +set_location_assignment PIN_A5 -to AUD_DACLRCK +set_location_assignment PIN_B5 -to AUD_DACDAT +set_location_assignment PIN_B4 -to AUD_XCK +set_location_assignment PIN_A4 -to AUD_BCLK +set_location_assignment PIN_R20 -to LEDR[0] +set_location_assignment PIN_R19 -to LEDR[1] +set_location_assignment PIN_U19 -to LEDR[2] +set_location_assignment PIN_Y19 -to LEDR[3] +set_location_assignment PIN_T18 -to LEDR[4] +set_location_assignment PIN_V19 -to LEDR[5] +set_location_assignment PIN_Y18 -to LEDR[6] +set_location_assignment PIN_U18 -to LEDR[7] +set_location_assignment PIN_R18 -to LEDR[8] +set_location_assignment PIN_R17 -to LEDR[9] +set_location_assignment PIN_L22 -to SW[0] +set_location_assignment PIN_L21 -to SW[1] +set_location_assignment PIN_M22 -to SW[2] +set_location_assignment PIN_V12 -to SW[3] +set_location_assignment PIN_W12 -to SW[4] +set_location_assignment PIN_U12 -to SW[5] +set_location_assignment PIN_U11 -to SW[6] +set_location_assignment PIN_M2 -to SW[7] +set_location_assignment PIN_M1 -to SW[8] +set_location_assignment PIN_L2 -to SW[9] + + diff --git a/pnr/de1_tone/makefile b/pnr/de1_tone/makefile new file mode 100644 index 0000000..e9cf6e6 --- /dev/null +++ b/pnr/de1_tone/makefile @@ -0,0 +1,14 @@ +SIM_PROJECT_NAME = de1_tone +PROJECT = $(SIM_PROJECT_NAME) + +# Here the VHDL files for synthesis are defined. +include ../../sim/$(SIM_PROJECT_NAME)/makefile.sources + +# Add the toplevel fpga vhdl file +SOURCE_FILES = $(SYN_SOURCE_FILES) + +FAMILY = "Cyclone II" +DEVICE = EP2C20F484C7 +PROGFILEEXT = sof + +include ../makefile -- cgit v1.2.3