From 1d5a8634e3a54bbcd2e6ac3074e6c38f085feef0 Mon Sep 17 00:00:00 2001 From: Matthias Kamuf Date: Wed, 4 May 2022 14:56:11 +0200 Subject: Added source files for simple FIR filter --- sim/fir/makefile.sources | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100755 sim/fir/makefile.sources (limited to 'sim/fir/makefile.sources') diff --git a/sim/fir/makefile.sources b/sim/fir/makefile.sources new file mode 100755 index 0000000..575e14f --- /dev/null +++ b/sim/fir/makefile.sources @@ -0,0 +1,18 @@ +## ---------------------------------------------------------------------------- +## Script : makefile.sources +## ---------------------------------------------------------------------------- +## Author : Johann Faerber +## Company : University of Applied Sciences Augsburg +## ---------------------------------------------------------------------------- +## Description: provide all the VHDL source files in the variable SYN_SOURCE_FILES +## Attention !!! +## ------------- +## Do not forget a new line after the final source file ! +## ---------------------------------------------------------------------------- + +SYN_SOURCE_FILES = \ +../../src/fir_mac_rtl.vhd \ +../../src/fir_structure.vhd \ + +# do not delete this line +# ----------------------------------------------------------------------------- -- cgit v1.2.3