From a04bbf15b0f51696894e37f3e566998108aefd74 Mon Sep 17 00:00:00 2001 From: Johann Faerber Date: Wed, 9 Mar 2022 09:48:43 +0100 Subject: added basic design directory structure --- sim/mux2to1/makefile_structure_errors.sources | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 sim/mux2to1/makefile_structure_errors.sources (limited to 'sim/mux2to1/makefile_structure_errors.sources') diff --git a/sim/mux2to1/makefile_structure_errors.sources b/sim/mux2to1/makefile_structure_errors.sources new file mode 100644 index 0000000..c412baf --- /dev/null +++ b/sim/mux2to1/makefile_structure_errors.sources @@ -0,0 +1,20 @@ +## ---------------------------------------------------------------------------- +## Script : makefile.sources +## ---------------------------------------------------------------------------- +## Author : Johann Faerber +## Company : University of Applied Sciences Augsburg +## ---------------------------------------------------------------------------- +## Description: provide all the VHDL source files in the variable SYN_SOURCE_FILES +## Attention !!! +## ------------- +## Do not forget a new line after the final source file ! +## ---------------------------------------------------------------------------- + +SYN_SOURCE_FILES = \ +../../src/and2gate_equation.vhd \ +../../src/or2gate_equation.vhd \ +../../src/invgate_equation.vhd \ +../../src/mux2to1_structure_errors.vhd \ + +# do not delete this line +# ----------------------------------------------------------------------------- -- cgit v1.2.3