From a04bbf15b0f51696894e37f3e566998108aefd74 Mon Sep 17 00:00:00 2001
From: Johann Faerber <johann.faerber@hs-augsburg.de>
Date: Wed, 9 Mar 2022 09:48:43 +0100
Subject: added basic design directory structure

---
 src/cntdn_rtl.vhd | 47 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 src/cntdn_rtl.vhd

(limited to 'src/cntdn_rtl.vhd')

diff --git a/src/cntdn_rtl.vhd b/src/cntdn_rtl.vhd
new file mode 100644
index 0000000..7ce14ea
--- /dev/null
+++ b/src/cntdn_rtl.vhd
@@ -0,0 +1,47 @@
+-------------------------------------------------------------------------------
+-- Module     : cntdn
+-------------------------------------------------------------------------------
+-- Author     : Johann Faerber
+-- Company    : University of Applied Sciences Augsburg
+-------------------------------------------------------------------------------
+-- Description: Down-Counter
+--              including a low-active asynchronous reset input rst_ni
+--              a high-active enable input en_pi
+--              and a terminal count output: tc = 1 when count = 0
+-------------------------------------------------------------------------------
+-- Revisions  : see end of file
+-------------------------------------------------------------------------------
+LIBRARY IEEE;
+USE IEEE.std_logic_1164.ALL;
+USE IEEE.numeric_std.ALL;
+
+ENTITY cntdn IS
+  PORT (clk_i   : IN  std_ulogic;
+        rst_ni  : IN  std_ulogic;
+        en_pi   : IN  std_ulogic;
+        count_o : OUT std_ulogic_vector(3 DOWNTO 0);
+        tc_o    : OUT std_ulogic
+        );
+END cntdn;
+
+ARCHITECTURE rtl OF cntdn IS
+
+
+BEGIN
+
+  incrementer : 
+
+  state_register : 
+
+  counter_output : 
+
+  terminal_output : 
+
+END rtl;
+
+-------------------------------------------------------------------------------
+-- Revisions:
+-- ----------
+-- $Id:$
+-------------------------------------------------------------------------------
+
-- 
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