From a04bbf15b0f51696894e37f3e566998108aefd74 Mon Sep 17 00:00:00 2001 From: Johann Faerber Date: Wed, 9 Mar 2022 09:48:43 +0100 Subject: added basic design directory structure --- src/invgate_equation.vhd | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 src/invgate_equation.vhd (limited to 'src/invgate_equation.vhd') diff --git a/src/invgate_equation.vhd b/src/invgate_equation.vhd new file mode 100644 index 0000000..69e920e --- /dev/null +++ b/src/invgate_equation.vhd @@ -0,0 +1,34 @@ +------------------------------------------------------------------------------- +-- Module : invgate +------------------------------------------------------------------------------- +-- Author : Johann Faerber +-- Company : University of Applied Sciences Augsburg +------------------------------------------------------------------------------- +-- Description: Inverter Gate +-- function modelled by logic equation +------------------------------------------------------------------------------- +-- Revisions : see end of file +------------------------------------------------------------------------------- +LIBRARY IEEE; +USE IEEE.std_logic_1164.ALL; + +ENTITY invgate IS + PORT (a_i : IN std_ulogic; -- data input a + y_o : OUT std_ulogic -- data output y + ); +END invgate; + +ARCHITECTURE equation OF invgate IS + +BEGIN + + y_o <= NOT a_i; + +END equation; + +------------------------------------------------------------------------------- +-- Revisions: +-- ---------- +-- $Id:$ +------------------------------------------------------------------------------- + -- cgit v1.2.3