diff options
| author | Friedrich Beckmann <friedrich.beckmann@hs-augsburg.de> | 2022-07-25 17:55:39 +0200 |
|---|---|---|
| committer | Friedrich Beckmann <friedrich.beckmann@hs-augsburg.de> | 2022-07-25 17:55:39 +0200 |
| commit | 3fff6023602822531efdae30bc8ebf862967f1ef (patch) | |
| tree | 16028102b8d850f8ab3115d28a8539ca6bc5f51d /VexRiscv/src/test/cpp/raw/icache/build | |
Initial Commit
Diffstat (limited to 'VexRiscv/src/test/cpp/raw/icache/build')
| -rw-r--r-- | VexRiscv/src/test/cpp/raw/icache/build/icache.asm | 51 | ||||
| -rw-r--r-- | VexRiscv/src/test/cpp/raw/icache/build/icache.hex | 11 |
2 files changed, 62 insertions, 0 deletions
diff --git a/VexRiscv/src/test/cpp/raw/icache/build/icache.asm b/VexRiscv/src/test/cpp/raw/icache/build/icache.asm new file mode 100644 index 0000000..993f21b --- /dev/null +++ b/VexRiscv/src/test/cpp/raw/icache/build/icache.asm @@ -0,0 +1,51 @@ + +build/icache.elf: file format elf32-littleriscv + + +Disassembly of section .crt_section: + +80000000 <_start>: +80000000: 00000097 auipc ra,0x0 +80000004: 04c08093 addi ra,ra,76 # 8000004c <fail> + +80000008 <test1>: +80000008: 00100e13 li t3,1 +8000000c: 00100093 li ra,1 +80000010: 00300113 li sp,3 +80000014: 00208093 addi ra,ra,2 +80000018: 02209a63 bne ra,sp,8000004c <fail> + +8000001c <test2>: +8000001c: 00200e13 li t3,2 +80000020: 01300093 li ra,19 +80000024: 00000117 auipc sp,0x0 +80000028: 02010113 addi sp,sp,32 # 80000044 <test2_trigger> +8000002c: 0040006f j 80000030 <test2_aligned> + +80000030 <test2_aligned>: +80000030: 00112023 sw ra,0(sp) +80000034: 0000100f fence.i +80000038: 00800a13 li s4,8 +8000003c: fffa0a13 addi s4,s4,-1 +80000040: fe0a1ee3 bnez s4,8000003c <test2_aligned+0xc> + +80000044 <test2_trigger>: +80000044: 0080006f j 8000004c <fail> +80000048: 0100006f j 80000058 <pass> + +8000004c <fail>: +8000004c: f0100137 lui sp,0xf0100 +80000050: f2410113 addi sp,sp,-220 # f00fff24 <pass+0x700ffecc> +80000054: 01c12023 sw t3,0(sp) + +80000058 <pass>: +80000058: f0100137 lui sp,0xf0100 +8000005c: f2010113 addi sp,sp,-224 # f00fff20 <pass+0x700ffec8> +80000060: 00012023 sw zero,0(sp) +80000064: 00000013 nop +80000068: 00000013 nop +8000006c: 00000013 nop +80000070: 00000013 nop +80000074: 00000013 nop +80000078: 00000013 nop + ... diff --git a/VexRiscv/src/test/cpp/raw/icache/build/icache.hex b/VexRiscv/src/test/cpp/raw/icache/build/icache.hex new file mode 100644 index 0000000..2588f0e --- /dev/null +++ b/VexRiscv/src/test/cpp/raw/icache/build/icache.hex @@ -0,0 +1,11 @@ +:0200000480007A
+:10000000970000009380C004130E100093001000AE
+:100010001301300093802000639A2002130E200009
+:100020009300300117010000130101026F0040002E
+:10003000232011000F100000130A8000130AFAFF9A
+:10004000E31E0AFE6F0080006F000001370110F010
+:10005000130141F22320C101370110F0130101F215
+:100060002320010013000000130000001300000013
+:100070001300000013000000130000000000000047
+:04008000000000007C
+:00000001FF
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