aboutsummaryrefslogtreecommitdiff
path: root/VexRiscvSocSoftware/projects/briey/libs/briey.h
diff options
context:
space:
mode:
Diffstat (limited to 'VexRiscvSocSoftware/projects/briey/libs/briey.h')
-rw-r--r--VexRiscvSocSoftware/projects/briey/libs/briey.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/VexRiscvSocSoftware/projects/briey/libs/briey.h b/VexRiscvSocSoftware/projects/briey/libs/briey.h
new file mode 100644
index 0000000..0426cee
--- /dev/null
+++ b/VexRiscvSocSoftware/projects/briey/libs/briey.h
@@ -0,0 +1,36 @@
+/*
+ * briey.h
+ *
+ * Created on: Aug 24, 2016
+ * Author: clp
+ */
+
+#ifndef BRIEY_H_
+#define BRIEY_H_
+
+#include "timer.h"
+#include "prescaler.h"
+#include "interrupt.h"
+#include "uart.h"
+#include "vga.h"
+#include "gpio.h"
+
+#define CORE_HZ 50000000
+
+#define GPIO_A_BASE ((Gpio_Reg*)(0xF0000000))
+#define GPIO_B_BASE ((Gpio_Reg*)(0xF0001000))
+#define UART ((Uart_Reg*)(0xF0010000))
+#define VGA_BASE ((Vga_Reg*)(0xF0030000))
+
+
+#define TIMER_PRESCALER ((Prescaler_Reg*)0xF0020000)
+#define TIMER_INTERRUPT ((InterruptCtrl_Reg*)0xF0020010)
+#define TIMER_A ((Timer_Reg*)0xF0020040)
+#define TIMER_B ((Timer_Reg*)0xF0020050)
+#define TIMER_C ((Timer_Reg*)0xF0020060)
+#define TIMER_D ((Timer_Reg*)0xF0020070)
+
+#define UART_SAMPLE_PER_BAUD 8
+
+
+#endif /* BRIEY_H_ */