add top_hex

5 files changed, 132 insertions, 0 deletions

diff --git a/pnr/top_hex/makefile b/pnr/top_hex/makefile
new file mode 100644
index 0000000..5e4d5e5
--- /dev/null
+++ b/pnr/top_hex/makefile
@@ -0,0 +1,9 @@
+
+PROJECT = top_hex
+
+# List all files for the project
+SOURCE_FILES = \
+../../src/top_hex.vhd \
+../../src/bin2seg.vhd
+
+include ../makefile
diff --git a/pnr/top_hex/top_hex_pins.tcl b/pnr/top_hex/top_hex_pins.tcl
new file mode 100644
index 0000000..5dd0a78
--- /dev/null
+++ b/pnr/top_hex/top_hex_pins.tcl
@@ -0,0 +1,43 @@
+# assign pin locations to a quartus project
+
+set_location_assignment PIN_L22 -to SW[0]
+set_location_assignment PIN_L21 -to SW[1]
+set_location_assignment PIN_M22 -to SW[2]
+set_location_assignment PIN_V12 -to SW[3]
+set_location_assignment PIN_W12 -to SW[4]
+set_location_assignment PIN_U12 -to SW[5]
+set_location_assignment PIN_U11 -to SW[6]
+set_location_assignment PIN_M2 -to SW[7]
+set_location_assignment PIN_M1 -to SW[8]
+set_location_assignment PIN_L2 -to SW[9]
+set_location_assignment PIN_R20 -to LEDR[0]
+set_location_assignment PIN_R19 -to LEDR[1]
+set_location_assignment PIN_U19 -to LEDR[2]
+set_location_assignment PIN_Y19 -to LEDR[3]
+set_location_assignment PIN_T18 -to LEDR[4]
+set_location_assignment PIN_V19 -to LEDR[5]
+set_location_assignment PIN_Y18 -to LEDR[6]
+set_location_assignment PIN_U18 -to LEDR[7]
+set_location_assignment PIN_R18 -to LEDR[8]
+set_location_assignment PIN_R17 -to LEDR[9]
+set_location_assignment PIN_J2 -to HEX0[0] 
+set_location_assignment PIN_J1 -to HEX0[1]
+set_location_assignment PIN_H2 -to HEX0[2]
+set_location_assignment PIN_H1 -to HEX0[3]
+set_location_assignment PIN_F2 -to HEX0[4]
+set_location_assignment PIN_F1 -to HEX0[5]
+set_location_assignment PIN_E2 -to HEX0[6]
+set_location_assignment PIN_E1 -to HEX1[0]
+set_location_assignment PIN_H6 -to HEX1[1]
+set_location_assignment PIN_H5 -to HEX1[2]
+set_location_assignment PIN_H4 -to HEX1[3]
+set_location_assignment PIN_G3 -to HEX1[4]
+set_location_assignment PIN_D2 -to HEX1[5]
+set_location_assignment PIN_D1 -to HEX1[6]
+set_location_assignment PIN_G5 -to HEX2[0]
+set_location_assignment PIN_G6 -to HEX2[1]
+set_location_assignment PIN_C2 -to HEX2[2]
+set_location_assignment PIN_C1 -to HEX2[3]
+set_location_assignment PIN_E3 -to HEX2[4]
+set_location_assignment PIN_E4 -to HEX2[5]
+set_location_assignment PIN_D3 -to HEX2[6]
diff --git a/src/bin2seg.vhd b/src/bin2seg.vhd
new file mode 100644
index 0000000..0e56d28
--- /dev/null
+++ b/src/bin2seg.vhd
@@ -0,0 +1,50 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+-- Convert a binary number to control signals for HEX Display
+entity bin2seg is 
+port ( bin_i   : in      std_ulogic_vector(3 downto 0);
+       seg_o   : out     std_ulogic_vector(6 downto 0));  
+end entity;
+
+architecture rtl of bin2seg is 
+
+  -- seven-segment positions
+  -- 
+  -- segment positions    input vector index     segment name
+  --      a                      0            =>     a
+  --     ---                     1            =>     b
+  --  f |   | b                  2            =>     c
+  --     ---   <- g              3            =>     d 
+  --  e |   | c                  4            =>     e 
+  --     ---                     5            =>     f 
+  --      d                      6            =>     g
+
+
+  -- The segment LED will be switched on when the output is '0' and off when
+  -- output is '1'
+  
+begin
+    
+  with bin_i select
+    seg_o <=
+--   gfedcba segment
+    "1000000" when "0000",              -- 0
+    "1111001" when "0001",              -- 1
+    "0100100" when "0010",              -- 2
+    "0110000" when "0011",
+    "0011001" when "0100",
+    "0010010" when "0101",
+    "0000010" when "0110",
+    "1111000" when "0111",
+    "0000000" when "1000",
+    "0010000" when "1001",
+    "0001000" when "1010",
+    "0000011" when "1011",
+    "1000110" when "1100",
+    "0100001" when "1101",              -- 13
+    "0000110" when "1110",              -- 14
+    "0001110" when others;              -- 15
+
+end architecture rtl; 
+
diff --git a/src/top_hex.vhd b/src/top_hex.vhd
new file mode 100644
index 0000000..cfe2d33
--- /dev/null
+++ b/src/top_hex.vhd
@@ -0,0 +1,26 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity top_hex is 
+port ( SW   : in      std_ulogic_vector(9 downto 0);
+       HEX0 : out     std_ulogic_vector(6 downto 0);
+       HEX1 : out     std_ulogic_vector(6 downto 0);
+       HEX2 : out     std_ulogic_vector(6 downto 0);
+       LEDR : out     std_ulogic_vector(9 downto 0));
+end entity;
+
+architecture rtl of top_hex is
+begin
+
+LEDR <= SW;
+
+bin2seg_i0: entity work.bin2seg
+ port map(
+    bin_i => SW(3 downto 0),
+    seg_o => HEX0
+);
+
+HEX1 <= "1111111";
+HEX2 <= "1111111";
+
+end architecture rtl;
diff --git a/vhdl_ls.toml b/vhdl_ls.toml
index 7976b5a..4f5842d 100644
--- a/vhdl_ls.toml
+++ b/vhdl_ls.toml
@@ -6,4 +6,8 @@ top_simple.files = [
 top_shift.files = [
     'src/top_shift.vhd'
     ,'src/t_top_shift.vhd'
+    ]
+top_hex.files = [
+    'src/bin2seg.vhd'
+    ,'src/top_hex.vhd'
     ]
\ No newline at end of file