first commit with top_simple synthesis

3 files changed, 111 insertions, 0 deletions

diff --git a/pnr/makefile b/pnr/makefile
new file mode 100644
index 0000000..7d2752a
--- /dev/null
+++ b/pnr/makefile
@@ -0,0 +1,81 @@
+# Makefile for Quartus Synthesis
+# Be quiet
+#.SILENT:
+
+LOG_FILE = quartus.log
+FAMILY = "Cyclone II"
+DEVICE = EP2C20F484C7
+PROGFILEEXT = sof
+
+ECHO_TARGET := echo "$$@"  >> $(LOG_FILE) 2>&1
+TIME_STAMP := echo "$$@ $$(date --iso=seconds)" >> $(LOG_FILE) 2>&1
+
+help:
+	@echo '"make" does intentionally nothing. Type:'
+	@echo '  "make qproject" to create quartus project only'
+	@echo '  "make compile" to synthesize the design'
+	@echo '  "make prog" to configure programmable device'
+	@echo '  "make warnings to list all warnings'
+	@echo '  "make quartus" to start quartus graphical user interface'
+	@echo '  "make clean" to remove all generated files'
+
+qproject: $(PROJECT).qpf
+
+$(PROJECT).qpf: $(SOURCE_FILES)
+	@echo "Processing ..."
+	@echo "---- $@"  >> $(LOG_FILE) 2>&1
+	@$(TIME_STAMP)
+	@# assign VHDL design files
+	@rm -rf quartus_vhdl_source_files.tcl
+	@(for source_file in $(SOURCE_FILES); \
+	do \
+	    echo set_global_assignment -name VHDL_FILE $$source_file >> quartus_vhdl_source_files.tcl; \
+	done)
+	@# create a default timing constraint file assuming CLOCK_50
+	@echo "create_clock -period 20.000 -name CLOCK_50 CLOCK_50" > $(PROJECT).sdc
+	@# just create a quartus project
+	@quartus_sh -t ../../scripts/create_quartus_project_settings.tcl \
+	-projectname $(PROJECT) -family $(FAMILY) -device $(DEVICE) >> $(LOG_FILE) 2>&1
+
+compile: $(PROJECT).qpf flowsummary.log
+	@echo "---- $@"  >> $(LOG_FILE) 2>&1
+	@$(TIME_STAMP)
+
+flowsummary.log: $(SOURCE_FILES)  
+	@echo "---- $@"  >> $(LOG_FILE) 2>&1
+	@$(TIME_STAMP)
+	@(quartus_sh -t ../../scripts/quartus_project_flow.tcl \
+	  -projectname $(PROJECT) -process compile  >> $(LOG_FILE) 2>&1 \
+	  || (grep "Error (" $(LOG_FILE) && false))
+	@grep "warnings" $(LOG_FILE)
+	@echo
+	@echo "To display all warnings use: make warnings"
+	@echo
+
+prog: $(PROJECT).qpf flowsummary.log
+	@echo "---- $@"  >> $(LOG_FILE) 2>&1
+	@$(TIME_STAMP)
+	@quartus_pgm -c USB-Blaster --mode jtag --operation="p;$(PROJECT).$(PROGFILEEXT)" \
+	  >> $(LOG_FILE) 2>&1
+
+quartus: $(PROJECT).qpf
+	@echo "---- $@"  >> $(LOG_FILE) 2>&1
+	@$(TIME_STAMP)
+	@quartus $(PROJECT).qpf &
+
+warnings: $(LOG_FILE)
+	@echo "---- $@"  >> $(LOG_FILE) 2>&1
+	@$(TIME_STAMP)
+	@grep "Warning (" $(LOG_FILE)
+
+rtlview: $(PROJECT).qpf
+	@echo "---- $@"  >> $(LOG_FILE) 2>&1
+	@$(TIME_STAMP)
+	@#(quartus_sh -t ../../scripts/quartus_project_flow.tcl -projectname \
+	  $(PROJECT) -process compile  >> $(LOG_FILE) 2>&1 || (grep "Error (" $(LOG_FILE) && false))
+	@quartus_map --read_settings_files=on --write_settings_files=off \
+	  $(PROJECT) -c $(PROJECT) --analysis_and_elaboration >> $(LOG_FILE) 2>&1
+	@quartus $(PROJECT).qpf &
+
+clean:
+	@rm -rf *.rpt *.chg *.log quartus_vhdl_source_files.tcl *.htm *.eqn *.pin *.sof *.pof db incremental_db *.qpf *.qsf *.summary $(PROJECT).* *.sdc
diff --git a/pnr/top_simple/makefile b/pnr/top_simple/makefile
new file mode 100644
index 0000000..a75ec68
--- /dev/null
+++ b/pnr/top_simple/makefile
@@ -0,0 +1,8 @@
+
+PROJECT = top_simple
+
+# List all files for the project
+SOURCE_FILES = \
+../../src/top_simple.vhd
+
+include ../makefile
diff --git a/pnr/top_simple/top_simple_pins.tcl b/pnr/top_simple/top_simple_pins.tcl
new file mode 100644
index 0000000..98d3cbe
--- /dev/null
+++ b/pnr/top_simple/top_simple_pins.tcl
@@ -0,0 +1,22 @@
+# assign pin locations to a quartus project
+
+set_location_assignment PIN_L22 -to SW[0]
+set_location_assignment PIN_L21 -to SW[1]
+set_location_assignment PIN_M22 -to SW[2]
+set_location_assignment PIN_V12 -to SW[3]
+set_location_assignment PIN_W12 -to SW[4]
+set_location_assignment PIN_U12 -to SW[5]
+set_location_assignment PIN_U11 -to SW[6]
+set_location_assignment PIN_M2 -to SW[7]
+set_location_assignment PIN_M1 -to SW[8]
+set_location_assignment PIN_L2 -to SW[9]
+set_location_assignment PIN_R20 -to LEDR[0]
+set_location_assignment PIN_R19 -to LEDR[1]
+set_location_assignment PIN_U19 -to LEDR[2]
+set_location_assignment PIN_Y19 -to LEDR[3]
+set_location_assignment PIN_T18 -to LEDR[4]
+set_location_assignment PIN_V19 -to LEDR[5]
+set_location_assignment PIN_Y18 -to LEDR[6]
+set_location_assignment PIN_U18 -to LEDR[7]
+set_location_assignment PIN_R18 -to LEDR[8]
+set_location_assignment PIN_R17 -to LEDR[9]
\ No newline at end of file