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author | Friedrich Beckmann <friedrich.beckmann@tha.de> | 2024-05-10 19:08:32 +0200 |
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committer | Friedrich Beckmann <friedrich.beckmann@hs-augsburg.de> | 2024-05-28 12:22:40 +0200 |
commit | c6ee080fc68079392e9e66961bd11ebf52ab852d (patch) | |
tree | 533032cda8b117fcbe9ae7f252e27f9a7dbb2239 /src/cntm13.vhd | |
parent | cb1ff76e82fa1b77016530d61d16b426a9e1d5e3 (diff) |
add top_count solutions
Diffstat (limited to 'src/cntm13.vhd')
-rw-r--r-- | src/cntm13.vhd | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/cntm13.vhd b/src/cntm13.vhd index 9da61d4..3a8bfa9 100644 --- a/src/cntm13.vhd +++ b/src/cntm13.vhd @@ -12,7 +12,13 @@ entity cntm13 is end entity; architecture rtl of cntm13 is + signal cnt, ncnt : unsigned(3 downto 0); begin - + cnt <= to_unsigned(0,cnt'length) when rst_n = '0' else ncnt when en_i = '1' and rising_edge(clk); + ncnt <= to_unsigned(0,cnt'length) when up_i = '1' and cnt = 12 else + to_unsigned(12,cnt'length) when up_i = '0' and cnt = 0 else + cnt + 1 when up_i = '1' else + cnt - 1; +cnt_o <= std_ulogic_vector(cnt); end architecture rtl; |