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# Makefile for Quartus Synthesis
# Be quiet
#.SILENT:
LOG_FILE = quartus.log
FAMILY = "Cyclone II"
DEVICE = EP2C20F484C7
PROGFILEEXT = sof
ECHO_TARGET := echo "$$@" >> $(LOG_FILE) 2>&1
TIME_STAMP := echo "$$@ $$(date --iso=seconds)" >> $(LOG_FILE) 2>&1
help:
@echo '"make" does intentionally nothing. Type:'
@echo ' "make qproject" to create quartus project only'
@echo ' "make compile" to synthesize the design'
@echo ' "make prog" to configure programmable device'
@echo ' "make quartus" to start quartus graphical user interface'
@echo ' "make clean" to remove all generated files'
qproject: $(PROJECT).qpf
$(PROJECT).qpf: $(SOURCE_FILES)
# assign VHDL design files
rm -rf quartus_vhdl_source_files.tcl
(for source_file in $(SOURCE_FILES); \
do \
echo set_global_assignment -name VHDL_FILE $$source_file >> quartus_vhdl_source_files.tcl; \
done)
# create a default timing constraint file assuming CLOCK_50
echo "create_clock -period 20.000 -name CLOCK_50 CLOCK_50" > $(PROJECT).sdc
# just create a quartus project
quartus_sh --64bit -t ../../scripts/create_quartus_project_settings.tcl \
-projectname $(PROJECT) -family $(FAMILY) -device $(DEVICE)
compile: $(PROJECT).qpf flowsummary.log
flowsummary.log: $(SOURCE_FILES)
(quartus_sh --64bit -t ../../scripts/quartus_project_flow.tcl \
-projectname $(PROJECT) -process compile
prog: $(PROJECT).qpf flowsummary.log
quartus_pgm --64bit -c USB-Blaster --mode jtag --operation="p;$(PROJECT).$(PROGFILEEXT)"
quartus: $(PROJECT).qpf
@quartus --64bit $(PROJECT).qpf &
rtlview: $(PROJECT).qpf
quartus_sh --64bit -t ../../scripts/quartus_project_flow.tcl -projectname $(PROJECT) \
-process compile
quartus_map --64bit --read_settings_files=on --write_settings_files=off \
$(PROJECT) -c $(PROJECT) --analysis_and_elaboration
quartus --64bit $(PROJECT).qpf &
clean:
rm -rf *.rpt *.chg *.log quartus_vhdl_source_files.tcl *.htm *.eqn *.pin *.sof *.pof db incremental_db *.qpf *.qsf *.summary $(PROJECT).* *.sdc
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