src/cnt1sec.vhd


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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity cnt1sec is
  port (
    clk   : in std_ulogic;
    rst_n : in std_ulogic;
    en_o  : out std_ulogic);
end entity;

architecture rtl of cnt1sec is
begin

end architecture rtl;