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diff --git a/cpu-cache/amd-zen-architecture.jpg b/cpu-cache/amd-zen-architecture.jpg
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diff --git a/cpu-cache/cache-32bit-direct.jpg b/cpu-cache/cache-32bit-direct.jpg
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diff --git a/cpu-cache/cache-access-example.jpg b/cpu-cache/cache-access-example.jpg
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diff --git a/cpu-cache/cache-assoziativ-fehler.jpg b/cpu-cache/cache-assoziativ-fehler.jpg
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diff --git a/cpu-cache/cache-assoziativ.jpg b/cpu-cache/cache-assoziativ.jpg
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diff --git a/cpu-cache/cache-direct.jpg b/cpu-cache/cache-direct.jpg
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diff --git a/cpu-cache/cache-example-a.jpg b/cpu-cache/cache-example-a.jpg
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diff --git a/cpu-cache/cache-example-c.jpg b/cpu-cache/cache-example-c.jpg
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diff --git a/cpu-cache/cache-example-e.jpg b/cpu-cache/cache-example-e.jpg
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diff --git a/cpu-cache/cache-fastmath-errorrate.jpg b/cpu-cache/cache-fastmath-errorrate.jpg
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diff --git a/cpu-cache/cache-fastmath.jpg b/cpu-cache/cache-fastmath.jpg
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diff --git a/cpu-cache/cache-fehlzugriffsrate.jpg b/cpu-cache/cache-fehlzugriffsrate.jpg
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diff --git a/cpu-cache/cache-hierarchie.jpg b/cpu-cache/cache-hierarchie.jpg
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diff --git a/cpu-cache/cache-pyramide.jpg b/cpu-cache/cache-pyramide.jpg
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diff --git a/cpu-cache/cache-satz4.jpg b/cpu-cache/cache-satz4.jpg
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diff --git a/cpu-cache/cache-transfer.jpg b/cpu-cache/cache-transfer.jpg
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diff --git a/cpu-cache/cache-zugriff.jpg b/cpu-cache/cache-zugriff.jpg
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diff --git a/cpu-cache/dram-history.jpg b/cpu-cache/dram-history.jpg
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diff --git a/cpu-cache/ram-speed.jpg b/cpu-cache/ram-speed.jpg
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diff --git a/cpu-cache/sort-befehle.jpg b/cpu-cache/sort-befehle.jpg
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diff --git a/cpu-cache/sort-erklaerung.jpg b/cpu-cache/sort-erklaerung.jpg
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diff --git a/cpu-cache/sort-fehlzugriffe.jpg b/cpu-cache/sort-fehlzugriffe.jpg
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diff --git a/cpu-cache/sort-taktzyklen.jpg b/cpu-cache/sort-taktzyklen.jpg
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diff --git a/cpu-cache/virt-konzept.jpg b/cpu-cache/virt-konzept.jpg
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diff --git a/cpu-cache/virt-offset.jpg b/cpu-cache/virt-offset.jpg
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diff --git a/cpu-cache/virt-seitentabelle.jpg b/cpu-cache/virt-seitentabelle.jpg
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diff --git a/cpu-cache/virt-tlb.jpg b/cpu-cache/virt-tlb.jpg
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