Add KiCad 9 schematic, project libraries and datasheetsHEADmaster

Schematic (kicad/), one sheet per function as on ULX3S:
  - power: TLV62569 bucks for +1V1 / +3V3, AP2112K LDO for +2V5
  - usb: USB-C with PTC and TVS, CH347F for JTAG and UART
  - fpga_power, fpga_config, fpga_banks_01/23/67: ECP5 LFE5U-25F caBGA256
    (pin compatible with the 45F), quad SPI flash, 50 MHz CLOCK_50,
    ball assignment as in PINPLAN.md
  - ethernet: RTL8211F gigabit PHY, HR911130A RJ45, shield via 1M || 1nF 2kV
  - sdram: 32 MB W9825G6KH-6
  - hdmi: TMDS from the FPGA (LVCMOS33D), AC coupled, ESD protected
  - user_io: SW, KEY (debounced), LEDR, LEDG, HEX0-HEX3 with DE1 names
  - gpio: two DE1 compatible 2x20 headers (THDB-ADA on GPIO_0),
    Pmod A/B, ESD arrays
  - testpoints: bring-up pads, M3 mounting holes

All parts have LCSC numbers, MPN and manufacturer for JLCPCB assembly;
footprints are cross-checked against the EasyEDA data.

Libraries: ECP5 symbols generated from the Lattice pinout CSVs (kipart),
CH347F, RTL8211F, SM410561N symbols, HR911130A symbol and footprint from
KiCad library merge requests, generator scripts in lib/tools/.

Datasheets of all parts except resistors and capacitors in datasheets/
(manufacturer copyright, not covered by the project licenses).

1 files changed, 21 insertions, 0 deletions

diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..aa2b1bb
--- /dev/null
+++ b/.gitignore
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+# Reference designs cloned for comparison (ULX3S, ButterStick): separate repositories
+/ext/
+
+# KiCad: backups, autosave, lock files, caches, local view settings
+*-backups/
+_autosave-*
+*.lck
+~*.lck
+\#auto_saved_files\#
+fp-info-cache
+*.kicad_prl
+
+# KiCad exports for viewing (schematic PDF etc.)
+/kicad/*.pdf
+
+# Python
+__pycache__/
+*.pyc
+
+# Claude Code local settings (permissions of this machine)
+.claude/settings.local.json