diff options
Diffstat (limited to 'kicad/sdram.kicad_sch')
| -rw-r--r-- | kicad/sdram.kicad_sch | 4955 |
1 files changed, 4955 insertions, 0 deletions
diff --git a/kicad/sdram.kicad_sch b/kicad/sdram.kicad_sch new file mode 100644 index 0000000..ab2380c --- /dev/null +++ b/kicad/sdram.kicad_sch @@ -0,0 +1,4955 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "c8304b0c-78ff-59d7-af67-15300eb4592f") + (paper "A4") + (title_block + (title "eboard - SDRAM") + (date "2026-11-08") + (rev "0.1") + (comment 1 "CERN-OHL-S-2.0") + ) + (lib_symbols +(symbol "Device:C" +(property "Reference" "C" + (at 0.635 2.54 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + ) +(property "Value" "C" + (at 0.635 -2.54 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + ) +(property "Footprint" "" + (at 0.9652 -3.81 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) +(property "Datasheet" "~" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) +(property "Description" "Unpolarized capacitor" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) 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"747621ee-4d32-5df7-a472-55d2be51c6b7") + ) + (wire + (pts + (xy 76.2 172.72) (xy 88.9 172.72) + ) + (stroke + (width 0) + (type default) + ) + (uuid "b3b43aa3-c8e4-5d2c-a68c-7f556558668c") + ) + (wire + (pts + (xy 88.9 172.72) (xy 101.6 172.72) + ) + (stroke + (width 0) + (type default) + ) + (uuid "f9e45941-739b-5b93-b1fb-eaf5d6b582b8") + ) + (wire + (pts + (xy 101.6 172.72) (xy 114.3 172.72) + ) + (stroke + (width 0) + (type default) + ) + (uuid "80d5d893-e71d-5814-a0b6-917a130169e1") + ) + (wire + (pts + (xy 114.3 172.72) (xy 127 172.72) + ) + (stroke + (width 0) + (type default) + ) + (uuid "fae1197d-4d6c-5793-b5f7-29affb63d6da") + ) + (text "DRAM_CLK series resistor\nclose to the FPGA" + (exclude_from_sim no) + (at 200.66 127 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left top) + ) + (uuid "d5af7893-6cd3-512e-890c-7fe226c34963") + ) + (text "Decoupling: 10 uF bulk, 100 nF at each VDD (1, 14, 27) and VDDQ (3, 9, 43, 49) pin." + (exclude_from_sim no) + (at 27.94 163.83 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left top) + ) + (uuid "6a5ef66a-e794-521d-9e8b-b8bc642590f4") + ) + (text "SDRAM 32 MB: Winbond W9825G6KH-6 (JLCPCB C62246), 16 bit, 166 MHz" + (exclude_from_sim no) + (at 25.4 20.32 0) + (effects + (font + (size 2.54 2.54) + (bold yes) + ) + (justify left top) + ) + (uuid "8c624df5-32dc-5eb9-80fa-1cbebd3d5615") + ) + (text "Pin compatible with Micron MT48LC16M16A2TG (KiCad symbol, as on ULX3S). Net names as on the DE1\n(DRAM_*), plus DRAM_ADDR12 for 32 MB. FPGA banks 7 + 6 (PINPLAN.md); short traces, no series\nresistors on data/address (as on ULX3S)." + (exclude_from_sim no) + (at 25.4 27.94 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left top) + ) + (uuid "8f8d3ffa-c761-51e6-8d4c-a55f386621cb") + ) + (global_label "DRAM_DQ0" + (shape bidirectional) + (at 160.02 71.12 0) + (fields_autoplaced yes) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "039e9c84-5a1a-571f-aabb-84b6166b646d") + (property "Intersheetrefs" "${INTERSHEET_REFS}" + (at 160.02 71.12 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + (hide yes) + ) + ) + ) + (global_label "DRAM_DQ1" + (shape bidirectional) + (at 160.02 73.66 0) + (fields_autoplaced yes) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "de84f646-bcbe-5717-9d48-f76b05a91112") + (property "Intersheetrefs" "${INTERSHEET_REFS}" + (at 160.02 73.66 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + (hide yes) + ) + ) + ) + (global_label "DRAM_DQ2" + (shape bidirectional) + (at 160.02 76.2 0) + (fields_autoplaced yes) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "3ed17329-8016-5471-a389-81a1c0862c61") + (property "Intersheetrefs" "${INTERSHEET_REFS}" + (at 160.02 76.2 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + (hide yes) + ) + ) + ) + (global_label "DRAM_DQ3" + (shape bidirectional) + (at 160.02 78.74 0) + (fields_autoplaced yes) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "b5d40ee0-ee7d-5617-9fdb-5bb3e6e1e3da") + (property "Intersheetrefs" "${INTERSHEET_REFS}" + (at 160.02 78.74 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + (hide yes) + ) + ) + ) + (global_label "DRAM_DQ4" + (shape bidirectional) + (at 160.02 81.28 0) + (fields_autoplaced yes) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "f537b3c9-64a1-51db-9d22-aafddc0ed379") + (property "Intersheetrefs" "${INTERSHEET_REFS}" + (at 160.02 81.28 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + (hide yes) + ) + ) + ) + (global_label "DRAM_DQ5" + (shape bidirectional) + (at 160.02 83.82 0) + (fields_autoplaced yes) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "116c8aa2-8d52-5a53-9f07-4a54ae47144a") + (property "Intersheetrefs" "${INTERSHEET_REFS}" + (at 160.02 83.82 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + (hide yes) + ) + ) + ) + (global_label "DRAM_DQ6" + (shape bidirectional) + (at 160.02 86.36 0) + (fields_autoplaced yes) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "eef894af-e228-5332-a99a-9fc003053435") + (property "Intersheetrefs" "${INTERSHEET_REFS}" + (at 160.02 86.36 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + (hide yes) + ) + ) + ) + (global_label "DRAM_DQ7" + (shape bidirectional) + (at 160.02 88.9 0) + (fields_autoplaced yes) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid 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