renamed makefile to makefile.modelsim, added makefile.ghdl and symbolic link

4 files changed, 214 insertions, 87 deletions

diff --git a/sim/makefile b/sim/makefile
index 6e7bd40..7b0dbd9 100644..120000
--- a/sim/makefile
+++ b/sim/makefile
@@ -1,87 +1 @@
-## ----------------------------------------------------------------------------
-## Script     : makefile
-## ----------------------------------------------------------------------------
-## Author(s)  : Johann Faerber, Friedrich Beckmann
-## Company    : University of Applied Sciences Augsburg
-## ----------------------------------------------------------------------------
-## Description: This makefile allows automating design flow with ModelSim,
-##              it is based on a design directory structure shown at 
-##              the end of this file.
-## ----------------------------------------------------------------------------
-
-###################################################################
-# Main Targets
-#
-###################################################################
-
-help:
-	@echo '"make" does intentionally nothing. Type:'
-	@echo '  "make mproject" to create a new modelsim project only'
-	@echo '  "make compile" to compile all VHDL sources in batch mode'
-	@echo '  "make modelsim" to start modelsim with graphical user interface'
-	@echo '  "make sim" to start modelsim gui with the top testbench of the project'
-	@echo '  "make clean" to remove all generated files'
-
-mproject : mproject_created
-
-mproject_created : $(SOURCE_FILES)
-	# create modelsim project
-	rm -rf ./modelsim_sources.tcl
-	for source_file in $(SOURCE_FILES); do \
-	  echo project addfile $$source_file >> modelsim_sources.tcl; \
-	done
-	vsim -modelsimini ../../scripts/modelsim.ini -c -do "project new [pwd] $(PROJECT); source ./modelsim_sources.tcl; quit -f"
-	touch mproject_created
-
-compile: ./work/_vmake
-
-./work/_vmake: mproject_created
-	vsim -c -do "project open $(PROJECT); project calculateorder; quit -f"
-	grep Error transcript; if [ $$? -eq 0 ] ; then rm -rf work/_vmake; exit 1; fi
-
-
-modelsim: mproject_created
-	vsim -i -do "project open $(PROJECT)" &
-
-sim: ./work/_vmake
-	vsim -i -do "project open $(PROJECT); vsim work.t_$(PROJECT)(tbench); add wave *; run -a;" &
-
-clean:
-	rm -rf *.mpf *.mti *.ini *.wlf wlf* transcript work modelsim_sources.tcl mproject_created
-
-## ----------------------------------------------------------------------------
-## Description: 
-## ------------
-## assumes the following design directory structure as prerequisite
-## 
-## DigitaltechnikPraktikum
-## |   
-## +---src
-## |       and2gate_equation.vhd
-## |       invgate_equation.vhd
-## |       mux2to1_structure.vhd
-## |       or2gate_equation.vhd
-## |       t_mux2to1.vhd
-## |       de1_mux2to1_structure.vhd
-## |
-## +---sim
-## |   |   makefile
-## |   |
-## |   \---mux2to1
-## |           makefile
-## |           makefile.sources
-## |
-## +---pnr
-## |   |   makefile
-## |   |
-## |   \---de1_mux2to1
-## |           de1_mux2to1_pins.tcl
-## |           makefile
-## |
-## \---scripts
-##         de1_pin_assignments_minimumio.csv
-##         de1_pin_assignments_minimumio.tcl
-##         modelsim.ini
-##         quartus_project_settings.tcl
-## ----------------------------------------------------------------------------
-
+makefile.ghdl
\ No newline at end of file
diff --git a/sim/makefile.ghdl b/sim/makefile.ghdl
new file mode 100644
index 0000000..e7857b1
--- /dev/null
+++ b/sim/makefile.ghdl
@@ -0,0 +1,108 @@
+## ----------------------------------------------------------------------------
+## Script     : makefile
+## ----------------------------------------------------------------------------
+## Author(s)  : Johann Faerber, Friedrich Beckmann
+## Company    : University of Applied Sciences Augsburg
+## ----------------------------------------------------------------------------
+## Description: This makefile allows automating design flow with ModelSim,
+##              it is based on a design directory structure shown at 
+##              the end of this file.
+## ----------------------------------------------------------------------------
+
+GHDL_CMD = ghdl
+GHDL_OPTIONS  = --std=08 --workdir=work
+LOG_FILE = ghdl.log
+
+ECHO_TARGET := echo "$$@"  >> $(LOG_FILE) 2>&1
+TIME_STAMP := echo "$$@ $$(date --iso=seconds)" >> $(LOG_FILE) 2>&1
+
+###################################################################
+# Main Targets
+#
+###################################################################
+
+help:
+	@echo '"make" does intentionally nothing. Type:'
+	@echo '  "make gproject" to create a new ghdl project only'
+	@echo '  "make compile" to compile all VHDL sources in batch mode'
+	@echo '  "make sim" to run ghdl with the top testbench of the project'
+	@echo '  "make wave" to display the simulation results in the time domain'
+	@echo '  "make clean" to remove all generated files'
+
+gproject : gproject_created
+
+gproject_created : $(SOURCE_FILES) makefile.sources
+	@echo "---- $@"  >> $(LOG_FILE) 2>&1
+	@$(TIME_STAMP)
+	@rm -rf ./ghdl_sources.tcl
+	@# Create a directory work if it does not exist. Otherwise do nothing.
+	@[ -d work ] || mkdir -p work
+	@$(GHDL_CMD) -i $(GHDL_OPTIONS) $(SOURCE_FILES) >> $(LOG_FILE) 2>&1
+	@touch gproject_created
+
+compile: ./work/work-obj08.cf
+
+
+./work/work-obj08.cf: gproject_created
+	@echo "---- $@"  >> $(LOG_FILE) 2>&1
+	@$(TIME_STAMP)
+	@$(GHDL_CMD) -m $(GHDL_OPTIONS) t_$(PROJECT) >> $(LOG_FILE) 2>&1
+
+
+sim: ./work/work-obj08.cf
+	@echo "---- $@"  >> $(LOG_FILE) 2>&1
+	@$(TIME_STAMP)
+	@$(GHDL_CMD) -r $(GHDL_OPTIONS)  t_$(PROJECT) --wave=t_${PROJECT}.ghw >> $(LOG_FILE) 2>&1
+
+t_${PROJECT}.ghw: ./work/work-obj08.cf
+	@echo "---- $@"  >> $(LOG_FILE) 2>&1
+	@$(TIME_STAMP)
+	@$(GHDL_CMD) -r $(GHDL_OPTIONS)  t_$(PROJECT) --wave=t_${PROJECT}.ghw >> $(LOG_FILE) 2>&1
+
+wave: t_${PROJECT}.ghw
+	@echo "---- $@"  >> $(LOG_FILE) 2>&1
+	@$(TIME_STAMP)
+	@gtkwave t_${PROJECT}.ghw view_signals.gtkw  >> $(LOG_FILE) 2>&1 &
+
+check-errors:
+	less ghdl.log
+
+clean:
+	@$(GHDL_CMD) --remove; rm -rf work*.cf work *.vcd *.ghw *.log ghdl_sources.tcl gproject_created
+
+## ----------------------------------------------------------------------------
+## Description: 
+## ------------
+## assumes the following design directory structure as prerequisite
+## 
+## DigitaltechnikPraktikum
+## |   
+## +---src
+## |       and2gate_equation.vhd
+## |       invgate_equation.vhd
+## |       mux2to1_structure.vhd
+## |       or2gate_equation.vhd
+## |       t_mux2to1.vhd
+## |       de1_mux2to1_structure.vhd
+## |
+## +---sim
+## |   |   makefile
+## |   |
+## |   \---mux2to1
+## |           makefile
+## |           makefile.sources
+## |
+## +---pnr
+## |   |   makefile
+## |   |
+## |   \---de1_mux2to1
+## |           de1_mux2to1_pins.tcl
+## |           makefile
+## |
+## \---scripts
+##         de1_pin_assignments_minimumio.csv
+##         de1_pin_assignments_minimumio.tcl
+##         modelsim.ini
+##         quartus_project_settings.tcl
+## ----------------------------------------------------------------------------
+
diff --git a/sim/makefile.modelsim b/sim/makefile.modelsim
new file mode 100644
index 0000000..6e7bd40
--- /dev/null
+++ b/sim/makefile.modelsim
@@ -0,0 +1,87 @@
+## ----------------------------------------------------------------------------
+## Script     : makefile
+## ----------------------------------------------------------------------------
+## Author(s)  : Johann Faerber, Friedrich Beckmann
+## Company    : University of Applied Sciences Augsburg
+## ----------------------------------------------------------------------------
+## Description: This makefile allows automating design flow with ModelSim,
+##              it is based on a design directory structure shown at 
+##              the end of this file.
+## ----------------------------------------------------------------------------
+
+###################################################################
+# Main Targets
+#
+###################################################################
+
+help:
+	@echo '"make" does intentionally nothing. Type:'
+	@echo '  "make mproject" to create a new modelsim project only'
+	@echo '  "make compile" to compile all VHDL sources in batch mode'
+	@echo '  "make modelsim" to start modelsim with graphical user interface'
+	@echo '  "make sim" to start modelsim gui with the top testbench of the project'
+	@echo '  "make clean" to remove all generated files'
+
+mproject : mproject_created
+
+mproject_created : $(SOURCE_FILES)
+	# create modelsim project
+	rm -rf ./modelsim_sources.tcl
+	for source_file in $(SOURCE_FILES); do \
+	  echo project addfile $$source_file >> modelsim_sources.tcl; \
+	done
+	vsim -modelsimini ../../scripts/modelsim.ini -c -do "project new [pwd] $(PROJECT); source ./modelsim_sources.tcl; quit -f"
+	touch mproject_created
+
+compile: ./work/_vmake
+
+./work/_vmake: mproject_created
+	vsim -c -do "project open $(PROJECT); project calculateorder; quit -f"
+	grep Error transcript; if [ $$? -eq 0 ] ; then rm -rf work/_vmake; exit 1; fi
+
+
+modelsim: mproject_created
+	vsim -i -do "project open $(PROJECT)" &
+
+sim: ./work/_vmake
+	vsim -i -do "project open $(PROJECT); vsim work.t_$(PROJECT)(tbench); add wave *; run -a;" &
+
+clean:
+	rm -rf *.mpf *.mti *.ini *.wlf wlf* transcript work modelsim_sources.tcl mproject_created
+
+## ----------------------------------------------------------------------------
+## Description: 
+## ------------
+## assumes the following design directory structure as prerequisite
+## 
+## DigitaltechnikPraktikum
+## |   
+## +---src
+## |       and2gate_equation.vhd
+## |       invgate_equation.vhd
+## |       mux2to1_structure.vhd
+## |       or2gate_equation.vhd
+## |       t_mux2to1.vhd
+## |       de1_mux2to1_structure.vhd
+## |
+## +---sim
+## |   |   makefile
+## |   |
+## |   \---mux2to1
+## |           makefile
+## |           makefile.sources
+## |
+## +---pnr
+## |   |   makefile
+## |   |
+## |   \---de1_mux2to1
+## |           de1_mux2to1_pins.tcl
+## |           makefile
+## |
+## \---scripts
+##         de1_pin_assignments_minimumio.csv
+##         de1_pin_assignments_minimumio.tcl
+##         modelsim.ini
+##         quartus_project_settings.tcl
+## ----------------------------------------------------------------------------
+
diff --git a/vhdl_ls.toml b/vhdl_ls.toml
new file mode 100644
index 0000000..12ad58f
--- /dev/null
+++ b/vhdl_ls.toml
@@ -0,0 +1,18 @@
+[libraries]
+
+all_vhdl_sources.files = [
+    'src/*.vhd'
+]
+
+mux2to1.files = [
+    'src/and2gate_equation.vhd',
+    'src/or2gate_equation.vhd',
+    'src/invgate_equation.vhd',
+    'src/mux2to1_structure.vhd',
+    'src/t_mux2to1.vhd'
+]
+
+pwm.files = [
+    'src/pwm_rtl.vhd',
+    'src/cntdnmodm_rtl.vhd'
+]
\ No newline at end of file