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-------------------------------------------------------------------------------
-- Module : falling_edge_detector
-------------------------------------------------------------------------------
-- Author : Johann Faerber
-- Company : University of Applied Sciences Augsburg
-------------------------------------------------------------------------------
-- Description: detects a falling edge of input signal x_i
-- and produces a high-active signal for one clock period at
-- output fall_o
-- clk_i __|--|__|--|__|--|__|--|__|--|__|--|__|--|__|--|__|--|
-- x_i -----|___________________________________|-----------
-- fall_o ________|-----|______________________________________
-------------------------------------------------------------------------------
-- Revisions : see end of file
-------------------------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
ENTITY falling_edge_detector IS
PORT (
clk_i : IN std_ulogic;
rst_ni : IN std_ulogic;
x_i : IN std_ulogic;
fall_o : OUT std_ulogic
);
END falling_edge_detector;
-------------------------------------------------------------------------------
-- Revisions:
-- ----------
-- $Id:$
-------------------------------------------------------------------------------
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