diff options
Diffstat (limited to 'VexRiscv/src/test/cpp/raw/fpu')
| -rw-r--r-- | VexRiscv/src/test/cpp/raw/fpu/.gitignore | 4 | ||||
| -rw-r--r-- | VexRiscv/src/test/cpp/raw/fpu/build/amo.asm | 247 | ||||
| -rw-r--r-- | VexRiscv/src/test/cpp/raw/fpu/build/amo.hex | 45 | ||||
| -rw-r--r-- | VexRiscv/src/test/cpp/raw/fpu/build/fpu.asm | 276 | ||||
| -rw-r--r-- | VexRiscv/src/test/cpp/raw/fpu/build/fpu.hex | 62 | ||||
| -rw-r--r-- | VexRiscv/src/test/cpp/raw/fpu/makefile | 5 | ||||
| -rw-r--r-- | VexRiscv/src/test/cpp/raw/fpu/src/crt.S | 193 | ||||
| -rw-r--r-- | VexRiscv/src/test/cpp/raw/fpu/src/ld | 16 |
8 files changed, 848 insertions, 0 deletions
diff --git a/VexRiscv/src/test/cpp/raw/fpu/.gitignore b/VexRiscv/src/test/cpp/raw/fpu/.gitignore new file mode 100644 index 0000000..c12cb2c --- /dev/null +++ b/VexRiscv/src/test/cpp/raw/fpu/.gitignore @@ -0,0 +1,4 @@ +*.map +*.v +*.elf +*.o
\ No newline at end of file diff --git a/VexRiscv/src/test/cpp/raw/fpu/build/amo.asm b/VexRiscv/src/test/cpp/raw/fpu/build/amo.asm new file mode 100644 index 0000000..d86b61c --- /dev/null +++ b/VexRiscv/src/test/cpp/raw/fpu/build/amo.asm @@ -0,0 +1,247 @@ + +build/amo.elf: file format elf32-littleriscv + + +Disassembly of section .crt_section: + +80000000 <_start>: +80000000: 00100e13 li t3,1 +80000004: 00000097 auipc ra,0x0 +80000008: 27408093 addi ra,ra,628 # 80000278 <test1_data> +8000000c: 02d00113 li sp,45 +80000010: 0820a1af amoswap.w gp,sp,(ra) +80000014: 0000a203 lw tp,0(ra) +80000018: 02d00a13 li s4,45 +8000001c: 224a1663 bne s4,tp,80000248 <fail> +80000020: 00b00a13 li s4,11 +80000024: 223a1263 bne s4,gp,80000248 <fail> + +80000028 <test2>: +80000028: 00200e13 li t3,2 +8000002c: 00000097 auipc ra,0x0 +80000030: 25008093 addi ra,ra,592 # 8000027c <test2_data> +80000034: 03700113 li sp,55 +80000038: 0820a1af amoswap.w gp,sp,(ra) +8000003c: 0000a203 lw tp,0(ra) +80000040: 03700a13 li s4,55 +80000044: 204a1263 bne s4,tp,80000248 <fail> +80000048: 01600a13 li s4,22 +8000004c: 1e3a1e63 bne s4,gp,80000248 <fail> + +80000050 <test3>: +80000050: 00300e13 li t3,3 +80000054: 00000097 auipc ra,0x0 +80000058: 22c08093 addi ra,ra,556 # 80000280 <test3_data> +8000005c: 04200113 li sp,66 +80000060: 0020a1af amoadd.w gp,sp,(ra) +80000064: 0000a203 lw tp,0(ra) +80000068: 08b00a13 li s4,139 +8000006c: 1c4a1e63 bne s4,tp,80000248 <fail> +80000070: 04900a13 li s4,73 +80000074: 1c3a1a63 bne s4,gp,80000248 <fail> + +80000078 <test4>: +80000078: 00400e13 li t3,4 +8000007c: 00000097 auipc ra,0x0 +80000080: 20808093 addi ra,ra,520 # 80000284 <test4_data> +80000084: 05700113 li sp,87 +80000088: 2020a1af amoxor.w gp,sp,(ra) +8000008c: 0000a203 lw tp,0(ra) +80000090: 06d00a13 li s4,109 +80000094: 1a4a1a63 bne s4,tp,80000248 <fail> +80000098: 03a00a13 li s4,58 +8000009c: 1a3a1663 bne s4,gp,80000248 <fail> + +800000a0 <test5>: +800000a0: 00500e13 li t3,5 +800000a4: 00000097 auipc ra,0x0 +800000a8: 1e408093 addi ra,ra,484 # 80000288 <test5_data> +800000ac: 02c00113 li sp,44 +800000b0: 6020a1af amoand.w gp,sp,(ra) +800000b4: 0000a203 lw tp,0(ra) +800000b8: 02800a13 li s4,40 +800000bc: 184a1663 bne s4,tp,80000248 <fail> +800000c0: 03800a13 li s4,56 +800000c4: 183a1263 bne s4,gp,80000248 <fail> + +800000c8 <test6>: +800000c8: 00600e13 li t3,6 +800000cc: 00000097 auipc ra,0x0 +800000d0: 1c008093 addi ra,ra,448 # 8000028c <test6_data> +800000d4: 01800113 li sp,24 +800000d8: 4020a1af amoor.w gp,sp,(ra) +800000dc: 0000a203 lw tp,0(ra) +800000e0: 05b00a13 li s4,91 +800000e4: 164a1263 bne s4,tp,80000248 <fail> +800000e8: 04b00a13 li s4,75 +800000ec: 143a1e63 bne s4,gp,80000248 <fail> + +800000f0 <test7>: +800000f0: 00700e13 li t3,7 +800000f4: 00000097 auipc ra,0x0 +800000f8: 19c08093 addi ra,ra,412 # 80000290 <test7_data> +800000fc: 01800113 li sp,24 +80000100: 8020a1af amomin.w gp,sp,(ra) +80000104: 0000a203 lw tp,0(ra) +80000108: 01800a13 li s4,24 +8000010c: 124a1e63 bne s4,tp,80000248 <fail> +80000110: 03800a13 li s4,56 +80000114: 123a1a63 bne s4,gp,80000248 <fail> + +80000118 <test8>: +80000118: 00800e13 li t3,8 +8000011c: 00000097 auipc ra,0x0 +80000120: 17808093 addi ra,ra,376 # 80000294 <test8_data> +80000124: 05800113 li sp,88 +80000128: 8020a1af amomin.w gp,sp,(ra) +8000012c: 0000a203 lw tp,0(ra) +80000130: 05300a13 li s4,83 +80000134: 104a1a63 bne s4,tp,80000248 <fail> +80000138: 05300a13 li s4,83 +8000013c: 103a1663 bne s4,gp,80000248 <fail> + +80000140 <test9>: +80000140: 00900e13 li t3,9 +80000144: 00000097 auipc ra,0x0 +80000148: 15408093 addi ra,ra,340 # 80000298 <test9_data> +8000014c: fca00113 li sp,-54 +80000150: 8020a1af amomin.w gp,sp,(ra) +80000154: 0000a203 lw tp,0(ra) +80000158: fca00a13 li s4,-54 +8000015c: 0e4a1663 bne s4,tp,80000248 <fail> +80000160: 02100a13 li s4,33 +80000164: 0e3a1263 bne s4,gp,80000248 <fail> + +80000168 <test10>: +80000168: 00a00e13 li t3,10 +8000016c: 00000097 auipc ra,0x0 +80000170: 13008093 addi ra,ra,304 # 8000029c <test10_data> +80000174: 03400113 li sp,52 +80000178: 8020a1af amomin.w gp,sp,(ra) +8000017c: 0000a203 lw tp,0(ra) +80000180: fbf00a13 li s4,-65 +80000184: 0c4a1263 bne s4,tp,80000248 <fail> +80000188: fbf00a13 li s4,-65 +8000018c: 0a3a1e63 bne s4,gp,80000248 <fail> + +80000190 <test11>: +80000190: 00b00e13 li t3,11 +80000194: 00000097 auipc ra,0x0 +80000198: 10c08093 addi ra,ra,268 # 800002a0 <test11_data> +8000019c: fcc00113 li sp,-52 +800001a0: a020a1af amomax.w gp,sp,(ra) +800001a4: 0000a203 lw tp,0(ra) +800001a8: fcc00a13 li s4,-52 +800001ac: 084a1e63 bne s4,tp,80000248 <fail> +800001b0: fa900a13 li s4,-87 +800001b4: 083a1a63 bne s4,gp,80000248 <fail> + +800001b8 <test12>: +800001b8: 00c00e13 li t3,12 +800001bc: 00000097 auipc ra,0x0 +800001c0: 0e808093 addi ra,ra,232 # 800002a4 <test12_data> +800001c4: 03400113 li sp,52 +800001c8: a020a1af amomax.w gp,sp,(ra) +800001cc: 0000a203 lw tp,0(ra) +800001d0: 03400a13 li s4,52 +800001d4: 064a1a63 bne s4,tp,80000248 <fail> +800001d8: fc900a13 li s4,-55 +800001dc: 063a1663 bne s4,gp,80000248 <fail> + +800001e0 <test13>: +800001e0: 00d00e13 li t3,13 +800001e4: 00000097 auipc ra,0x0 +800001e8: 0c408093 addi ra,ra,196 # 800002a8 <test13_data> +800001ec: ffff0137 lui sp,0xffff0 +800001f0: c020a1af amominu.w gp,sp,(ra) +800001f4: 0000a203 lw tp,0(ra) +800001f8: ffff0a37 lui s4,0xffff0 +800001fc: 044a1663 bne s4,tp,80000248 <fail> +80000200: ffff0a37 lui s4,0xffff0 +80000204: 004a0a13 addi s4,s4,4 # ffff0004 <test14_data+0x7ffefd58> +80000208: 043a1063 bne s4,gp,80000248 <fail> +8000020c: 0480006f j 80000254 <pass> + +80000210 <test14>: +80000210: 00e00e13 li t3,14 +80000214: 00000097 auipc ra,0x0 +80000218: 09808093 addi ra,ra,152 # 800002ac <test14_data> +8000021c: ffff0137 lui sp,0xffff0 +80000220: 00c10113 addi sp,sp,12 # ffff000c <test14_data+0x7ffefd60> +80000224: e020a1af amomaxu.w gp,sp,(ra) +80000228: 0000a203 lw tp,0(ra) +8000022c: ffff0a37 lui s4,0xffff0 +80000230: 00ca0a13 addi s4,s4,12 # ffff000c <test14_data+0x7ffefd60> +80000234: 004a1a63 bne s4,tp,80000248 <fail> +80000238: ffff0a37 lui s4,0xffff0 +8000023c: 005a0a13 addi s4,s4,5 # ffff0005 <test14_data+0x7ffefd59> +80000240: 003a1463 bne s4,gp,80000248 <fail> +80000244: 0100006f j 80000254 <pass> + +80000248 <fail>: +80000248: f0100137 lui sp,0xf0100 +8000024c: f2410113 addi sp,sp,-220 # f00fff24 <test14_data+0x700ffc78> +80000250: 01c12023 sw t3,0(sp) + +80000254 <pass>: +80000254: f0100137 lui sp,0xf0100 +80000258: f2010113 addi sp,sp,-224 # f00fff20 <test14_data+0x700ffc74> +8000025c: 00012023 sw zero,0(sp) +80000260: 00000013 nop +80000264: 00000013 nop +80000268: 00000013 nop +8000026c: 00000013 nop +80000270: 00000013 nop +80000274: 00000013 nop + +80000278 <test1_data>: +80000278: 0000000b 0xb + +8000027c <test2_data>: +8000027c: 0016 c.slli zero,0x5 + ... + +80000280 <test3_data>: +80000280: 0049 c.nop 18 + ... + +80000284 <test4_data>: +80000284: 003a c.slli zero,0xe + ... + +80000288 <test5_data>: +80000288: 0038 addi a4,sp,8 + ... + +8000028c <test6_data>: +8000028c: 0000004b fnmsub.s ft0,ft0,ft0,ft0,rne + +80000290 <test7_data>: +80000290: 0038 addi a4,sp,8 + ... + +80000294 <test8_data>: +80000294: 00000053 fadd.s ft0,ft0,ft0,rne + +80000298 <test9_data>: +80000298: 0021 c.nop 8 + ... + +8000029c <test10_data>: +8000029c: ffffffbf 0xffffffbf + +800002a0 <test11_data>: +800002a0: ffa9 bnez a5,800001fa <test13+0x1a> +800002a2: ffff 0xffff + +800002a4 <test12_data>: +800002a4: ffc9 bnez a5,8000023e <test14+0x2e> +800002a6: ffff 0xffff + +800002a8 <test13_data>: +800002a8: 0004 0x4 +800002aa: ffff 0xffff + +800002ac <test14_data>: +800002ac: 0005 c.nop 1 +800002ae: ffff 0xffff diff --git a/VexRiscv/src/test/cpp/raw/fpu/build/amo.hex b/VexRiscv/src/test/cpp/raw/fpu/build/amo.hex new file mode 100644 index 0000000..74d3567 --- /dev/null +++ b/VexRiscv/src/test/cpp/raw/fpu/build/amo.hex @@ -0,0 +1,45 @@ +:0200000480007A
+:10000000130E100097000000938040271301D002C8
+:10001000AFA1200803A20000130AD00263164A22EF
+:10002000130AB00063123A22130E2000970000005A
+:100030009380002513017003AFA1200803A20000E4
+:10004000130A700363124A20130A6001631E3A1EEA
+:10005000130E3000970000009380C022130120048B
+:10006000AFA1200003A20000130AB008631E4A1CBF
+:10007000130A9004631A3A1C130E40009700000004
+:100080009380802013017005AFA1202003A20000FF
+:10009000130AD006631A4A1A130AA00363163A1AFF
+:1000A000130E5000970000009380401E1301C00201
+:1000B000AFA1206003A20000130A800263164A1851
+:1000C000130A800363123A18130E600097000000B1
+:1000D0009380001C13018001AFA1204003A2000007
+:1000E000130AB00563124A16130AB004631E3A14C9
+:1000F000130E7000970000009380C0191301800157
+:10010000AFA1208003A20000130A8001631E4A12DF
+:10011000130A8003631A3A12130E8000970000003E
+:100120009380801713018005AFA1208003A20000F7
+:10013000130A3005631A4A10130A300563163A1081
+:10014000130E900097000000938040151301A0FC4F
+:10015000AFA1208003A20000130AA0FC63164A0E80
+:10016000130A100263123A0E130EA000970000004B
+:100170009380001313014003AFA1208003A200006D
+:10018000130AF0FB63124A0C130AF0FB631E3A0ACF
+:10019000130EB000970000009380C0101301C0FC44
+:1001A000AFA120A003A20000130AC0FC631E4A08EE
+:1001B000130A90FA631A3A08130EC0009700000061
+:1001C0009380800E13014003AFA120A003A2000082
+:1001D000130A4003631A4A06130A90FC63163A0690
+:1001E000130ED000970000009380400C3701FFFFF2
+:1001F000AFA120C003A20000370AFFFF63164A0424
+:10020000370AFFFF130A4A0063103A046F008004A4
+:10021000130EE00097000000938080093701FFFF74
+:100220001301C100AFA120E003A20000370AFFFFC5
+:10023000130ACA00631A4A00370AFFFF130A5A005A
+:1002400063143A006F000001370110F0130141F20E
+:100250002320C101370110F0130101F22320010016
+:100260001300000013000000130000001300000042
+:1002700013000000130000000B0000001600000037
+:10028000490000003A000000380000004B00000068
+:10029000380000005300000021000000BFFFFFFFF6
+:1002A000A9FFFFFFC9FFFFFF0400FFFF0500FFFFDD
+:00000001FF
diff --git a/VexRiscv/src/test/cpp/raw/fpu/build/fpu.asm b/VexRiscv/src/test/cpp/raw/fpu/build/fpu.asm new file mode 100644 index 0000000..b769972 --- /dev/null +++ b/VexRiscv/src/test/cpp/raw/fpu/build/fpu.asm @@ -0,0 +1,276 @@ + +build/fpu.elf: file format elf32-littleriscv + + +Disassembly of section .crt_section: + +80000000 <_start>: +80000000: 00100e13 li t3,1 +80000004: 00000013 nop +80000008: 00000013 nop +8000000c: 00000013 nop +80000010: 00000013 nop +80000014: 00107153 fadd.s ft2,ft0,ft1 +80000018: 00000013 nop +8000001c: 00000013 nop +80000020: 00000013 nop +80000024: 00000013 nop +80000028: 0180006f j 80000040 <test2> +8000002c: 00000013 nop +80000030: 00000013 nop +80000034: 00000013 nop +80000038: 00000013 nop +8000003c: 00000013 nop + +80000040 <test2>: +80000040: 00200e13 li t3,2 +80000044: 00000097 auipc ra,0x0 +80000048: 2e80a083 lw ra,744(ra) # 8000032c <test1_data> +8000004c: 00107153 fadd.s ft2,ft0,ft1 +80000050: 00000013 nop +80000054: 00000013 nop +80000058: 00000013 nop +8000005c: 00000013 nop +80000060: 0200006f j 80000080 <test3> +80000064: 00000013 nop +80000068: 00000013 nop +8000006c: 00000013 nop +80000070: 00000013 nop +80000074: 00000013 nop +80000078: 00000013 nop +8000007c: 00000013 nop + +80000080 <test3>: +80000080: 00300e13 li t3,3 +80000084: 00000013 nop +80000088: 00000013 nop +8000008c: 00000013 nop +80000090: 00000013 nop +80000094: 0080006f j 8000009c <skip> +80000098: 00107153 fadd.s ft2,ft0,ft1 + +8000009c <skip>: +8000009c: 0240006f j 800000c0 <test4> +800000a0: 00000013 nop +800000a4: 00000013 nop +800000a8: 00000013 nop +800000ac: 00000013 nop +800000b0: 00000013 nop +800000b4: 00000013 nop +800000b8: 00000013 nop +800000bc: 00000013 nop + +800000c0 <test4>: +800000c0: 00400e13 li t3,4 +800000c4: 00000013 nop +800000c8: 00000013 nop +800000cc: 00000013 nop +800000d0: 00000013 nop +800000d4: 00000097 auipc ra,0x0 +800000d8: 25808093 addi ra,ra,600 # 8000032c <test1_data> +800000dc: 0000a107 flw ft2,0(ra) +800000e0: 00000013 nop +800000e4: 00000013 nop +800000e8: 00000013 nop +800000ec: 00000013 nop +800000f0: 0100006f j 80000100 <test5> +800000f4: 00000013 nop +800000f8: 00000013 nop +800000fc: 00000013 nop + +80000100 <test5>: +80000100: 00500e13 li t3,5 +80000104: 00000013 nop +80000108: 00000013 nop +8000010c: 00000013 nop +80000110: 00000013 nop +80000114: 00000097 auipc ra,0x0 +80000118: 21808093 addi ra,ra,536 # 8000032c <test1_data> +8000011c: 00000117 auipc sp,0x0 +80000120: 21410113 addi sp,sp,532 # 80000330 <test2_data> +80000124: 0000a087 flw ft1,0(ra) +80000128: 00012107 flw ft2,0(sp) +8000012c: 0020f1d3 fadd.s ft3,ft1,ft2 +80000130: 00000013 nop +80000134: 00000013 nop +80000138: 00000013 nop +8000013c: 00000013 nop +80000140: 0400006f j 80000180 <test6> +80000144: 00000013 nop +80000148: 00000013 nop +8000014c: 00000013 nop +80000150: 00000013 nop +80000154: 00000013 nop +80000158: 00000013 nop +8000015c: 00000013 nop +80000160: 00000013 nop +80000164: 00000013 nop +80000168: 00000013 nop +8000016c: 00000013 nop +80000170: 00000013 nop +80000174: 00000013 nop +80000178: 00000013 nop +8000017c: 00000013 nop + +80000180 <test6>: +80000180: 00600e13 li t3,6 +80000184: 00000013 nop +80000188: 00000013 nop +8000018c: 00000013 nop +80000190: 00000013 nop +80000194: 00000097 auipc ra,0x0 +80000198: 1a008093 addi ra,ra,416 # 80000334 <test3_data> +8000019c: 0030a027 fsw ft3,0(ra) +800001a0: 00000013 nop +800001a4: 00000013 nop +800001a8: 00000013 nop +800001ac: 00000013 nop +800001b0: 0100006f j 800001c0 <test7> +800001b4: 00000013 nop +800001b8: 00000013 nop +800001bc: 00000013 nop + +800001c0 <test7>: +800001c0: 00700e13 li t3,7 +800001c4: 00000097 auipc ra,0x0 +800001c8: 17008093 addi ra,ra,368 # 80000334 <test3_data> +800001cc: 00000117 auipc sp,0x0 +800001d0: 16c10113 addi sp,sp,364 # 80000338 <test4_data> +800001d4: 00000197 auipc gp,0x0 +800001d8: 16818193 addi gp,gp,360 # 8000033c <test5_data> +800001dc: 00000217 auipc tp,0x0 +800001e0: 16420213 addi tp,tp,356 # 80000340 <test6_data> +800001e4: 0000a207 flw ft4,0(ra) +800001e8: 00427253 fadd.s ft4,ft4,ft4 +800001ec: 0040f2d3 fadd.s ft5,ft1,ft4 +800001f0: 00412027 fsw ft4,0(sp) +800001f4: 0051a027 fsw ft5,0(gp) +800001f8: 00122027 fsw ft1,0(tp) # 0 <_start-0x80000000> +800001fc: 00000013 nop +80000200: 00000013 nop +80000204: 00000013 nop +80000208: 00000013 nop +8000020c: 0340006f j 80000240 <test8> +80000210: 00000013 nop +80000214: 00000013 nop +80000218: 00000013 nop +8000021c: 00000013 nop +80000220: 00000013 nop +80000224: 00000013 nop +80000228: 00000013 nop +8000022c: 00000013 nop +80000230: 00000013 nop +80000234: 00000013 nop +80000238: 00000013 nop +8000023c: 00000013 nop + +80000240 <test8>: +80000240: 00800e13 li t3,8 +80000244: c011f0d3 fcvt.wu.s ra,ft3 +80000248: 00000013 nop +8000024c: 00000013 nop +80000250: 00000013 nop +80000254: 00000013 nop +80000258: 0280006f j 80000280 <test9> +8000025c: 00000013 nop +80000260: 00000013 nop +80000264: 00000013 nop +80000268: 00000013 nop +8000026c: 00000013 nop +80000270: 00000013 nop +80000274: 00000013 nop +80000278: 00000013 nop +8000027c: 00000013 nop + +80000280 <test9>: +80000280: 00900e13 li t3,9 +80000284: a03100d3 fle.s ra,ft2,ft3 +80000288: a0218153 fle.s sp,ft3,ft2 +8000028c: a03181d3 fle.s gp,ft3,ft3 +80000290: 00000013 nop +80000294: 00000013 nop +80000298: 00000013 nop +8000029c: 00000013 nop +800002a0: 0200006f j 800002c0 <test10> +800002a4: 00000013 nop +800002a8: 00000013 nop +800002ac: 00000013 nop +800002b0: 00000013 nop +800002b4: 00000013 nop +800002b8: 00000013 nop +800002bc: 00000013 nop + +800002c0 <test10>: +800002c0: 00a00e13 li t3,10 +800002c4: 01000093 li ra,16 +800002c8: d010f0d3 fcvt.s.wu ft1,ra +800002cc: 01200113 li sp,18 +800002d0: 20000193 li gp,512 +800002d4: d0117153 fcvt.s.wu ft2,sp +800002d8: d011f1d3 fcvt.s.wu ft3,gp +800002dc: 00000217 auipc tp,0x0 +800002e0: 0a422203 lw tp,164(tp) # 80000380 <test10_data> +800002e4: d01272d3 fcvt.s.wu ft5,tp +800002e8: 00000013 nop +800002ec: 00000013 nop +800002f0: 00000013 nop +800002f4: 00000013 nop +800002f8: 0100006f j 80000308 <pass> + +800002fc <fail>: +800002fc: f0100137 lui sp,0xf0100 +80000300: f2410113 addi sp,sp,-220 # f00fff24 <test10_data+0x700ffba4> +80000304: 01c12023 sw t3,0(sp) + +80000308 <pass>: +80000308: f0100137 lui sp,0xf0100 +8000030c: f2010113 addi sp,sp,-224 # f00fff20 <test10_data+0x700ffba0> +80000310: 00012023 sw zero,0(sp) +80000314: 00000013 nop +80000318: 00000013 nop +8000031c: 00000013 nop +80000320: 00000013 nop +80000324: 00000013 nop +80000328: 00000013 nop + +8000032c <test1_data>: +8000032c: 0000 unimp +8000032e: 3fc0 fld fs0,184(a5) + +80000330 <test2_data>: +80000330: 0000 unimp +80000332: 40a0 lw s0,64(s1) + +80000334 <test3_data>: +80000334: 0049 c.nop 18 + ... + +80000338 <test4_data>: +80000338: 003a c.slli zero,0xe + ... + +8000033c <test5_data>: +8000033c: 0038 addi a4,sp,8 + ... + +80000340 <test6_data>: +80000340: 0000004b fnmsub.s ft0,ft0,ft0,ft0,rne +80000344: 00000013 nop +80000348: 00000013 nop +8000034c: 00000013 nop +80000350: 00000013 nop +80000354: 00000013 nop +80000358: 00000013 nop +8000035c: 00000013 nop +80000360: 00000013 nop +80000364: 00000013 nop +80000368: 00000013 nop +8000036c: 00000013 nop +80000370: 00000013 nop +80000374: 00000013 nop +80000378: 00000013 nop +8000037c: 00000013 nop + +80000380 <test10_data>: +80000380: 01d4 addi a3,sp,196 + ... diff --git a/VexRiscv/src/test/cpp/raw/fpu/build/fpu.hex b/VexRiscv/src/test/cpp/raw/fpu/build/fpu.hex new file mode 100644 index 0000000..4b83443 --- /dev/null +++ b/VexRiscv/src/test/cpp/raw/fpu/build/fpu.hex @@ -0,0 +1,62 @@ +:0200000480007A
+:10000000130E100013000000130000001300000086
+:1000100013000000537110001300000013000000D3
+:1000200013000000130000006F00800113000000A7
+:100030001300000013000000130000001300000074
+:10004000130E20009700000083A0802E5371100033
+:100050001300000013000000130000001300000054
+:100060006F000002130000001300000013000000E6
+:100070001300000013000000130000001300000034
+:10008000130E3000130000001300000013000000E6
+:10009000130000006F008000537110006F004002D9
+:1000A0001300000013000000130000001300000004
+:1000B00013000000130000001300000013000000F4
+:1000C000130E400013000000130000001300000096
+:1000D00013000000970000009380802507A1000016
+:1000E00013000000130000001300000013000000C4
+:1000F0006F00000113000000130000001300000057
+:10010000130E500013000000130000001300000045
+:100110001300000097000000938080211701000069
+:100120001301412187A0000007210100D3F1200025
+:100130001300000013000000130000001300000073
+:100140006F00000413000000130000001300000003
+:100150001300000013000000130000001300000053
+:100160001300000013000000130000001300000043
+:100170001300000013000000130000001300000033
+:10018000130E6000130000001300000013000000B5
+:1001900013000000970000009380001A27A0300091
+:1001A0001300000013000000130000001300000003
+:1001B0006F00000113000000130000001300000096
+:1001C000130E7000970000009380001717010000C5
+:1001D0001301C116970100009381811617020000D8
+:1001E0001302421607A2000053724200D3F24000ED
+:1001F0002720410027A051002720120013000000F3
+:100200001300000013000000130000006F00400303
+:100210001300000013000000130000001300000092
+:100220001300000013000000130000001300000082
+:100230001300000013000000130000001300000072
+:10024000130E8000D3F011C0130000001300000053
+:1002500013000000130000006F0080021300000074
+:100260001300000013000000130000001300000042
+:100270001300000013000000130000001300000032
+:10028000130E9000D30031A0538121A0D38131A05F
+:100290001300000013000000130000001300000012
+:1002A0006F000002130000001300000013000000A4
+:1002B00013000000130000001300000013000000F2
+:1002C000130EA00093000001D3F010D01301200101
+:1002D00093010020537111D0D3F111D01702000007
+:1002E0000322420AD37212D0130000001300000050
+:1002F00013000000130000006F000001370110F030
+:10030000130141F22320C101370110F0130101F262
+:100310002320010013000000130000001300000060
+:100320001300000013000000130000000000C03F95
+:100330000000A040490000003A0000003800000022
+:100340004B00000013000000130000001300000029
+:100350001300000013000000130000001300000051
+:100360001300000013000000130000001300000041
+:100370001300000013000000130000001300000031
+:10038000D401000000000000000000000000000098
+:10039000000000000000000000000000000000005D
+:1003A000000000000000000000000000000000004D
+:0803B000000000000000000045
+:00000001FF
diff --git a/VexRiscv/src/test/cpp/raw/fpu/makefile b/VexRiscv/src/test/cpp/raw/fpu/makefile new file mode 100644 index 0000000..4892095 --- /dev/null +++ b/VexRiscv/src/test/cpp/raw/fpu/makefile @@ -0,0 +1,5 @@ +PROJ_NAME=fpu + +FLOATING=yes + +include ../common/asm.mk
\ No newline at end of file diff --git a/VexRiscv/src/test/cpp/raw/fpu/src/crt.S b/VexRiscv/src/test/cpp/raw/fpu/src/crt.S new file mode 100644 index 0000000..302b98c --- /dev/null +++ b/VexRiscv/src/test/cpp/raw/fpu/src/crt.S @@ -0,0 +1,193 @@ +.globl _star +#define TEST_ID x28 + +_start: + +#define assert(reg, value) \ + li x20, value; \ + bne x20, reg, fail; + + +test1: + li TEST_ID, 1 + nop + nop + nop + nop + fadd.s f2, f0, f1 + nop + nop + nop + nop + j test2 + +.align 6 +test2: + li TEST_ID, 2 + lw x1, test1_data + fadd.s f2, f0, f1 + nop + nop + nop + nop + + j test3 + + +.align 6 +test3: + li TEST_ID, 3 + nop + nop + nop + nop + j skip + fadd.s f2, f0, f1 +skip: + j test4 + + + +.align 6 +test4: + li TEST_ID, 4 + nop + nop + nop + nop + la x1, test1_data + flw f2, 0(x1) + nop + nop + nop + nop + + j test5 + +.align 6 +test5: + li TEST_ID, 5 + nop + nop + nop + nop + la x1, test1_data + la x2, test2_data + flw f1, 0(x1) + flw f2, 0(x2) + fadd.s f3, f1, f2 + nop + nop + nop + nop + j test6 + +.align 6 +test6: + li TEST_ID, 6 + nop + nop + nop + nop + la x1, test3_data + fsw f3, 0(x1) + nop + nop + nop + nop + j test7 + +.align 6 +test7: + li TEST_ID, 7 + la x1, test3_data + la x2, test4_data + la x3, test5_data + la x4, test6_data + flw f4, 0(x1) + fadd.s f4, f4, f4 + fadd.s f5, f1, f4 + fsw f4, 0(x2) + fsw f5, 0(x3) + fsw f1, 0(x4) + nop + nop + nop + nop + j test8 + +.align 6 +test8: + li TEST_ID, 8 + fcvt.wu.s x1, f3 + nop + nop + nop + nop + j test9 + +.align 6 +test9: + li TEST_ID, 9 + fle.s x1, f2, f3 + fle.s x2, f3, f2 + fle.s x3, f3, f3 + nop + nop + nop + nop + j test10 + +.align 6 +test10: + li TEST_ID, 10 + li x1, 16 + fcvt.s.wu f1, x1 + li x2, 18 + li x3, 512 + fcvt.s.wu f2, x2 + fcvt.s.wu f3, x3 + lw x4, test10_data + fcvt.s.wu f5, x4 + nop + nop + nop + nop + + /* la x1, test1_data + li x2, 45 + amoswap.w x3,x2,(x1) + lw x4, 0(x1) + assert(x4, 45) + assert(x3, 11)*/ + + + + + j pass + + +fail: + li x2, 0xF00FFF24 + sw TEST_ID, 0(x2) + +pass: + li x2, 0xF00FFF20 + sw x0, 0(x2) + + nop + nop + nop + nop + nop + nop + + +test1_data: .word 0x3fc00000 //1.5f +test2_data: .word 0x40a00000 //5.0f +test3_data: .word 73 +test4_data: .word 58 +test5_data: .word 56 +test6_data: .word 75 +.align 6 +test10_data: .word 468 diff --git a/VexRiscv/src/test/cpp/raw/fpu/src/ld b/VexRiscv/src/test/cpp/raw/fpu/src/ld new file mode 100644 index 0000000..93d8de8 --- /dev/null +++ b/VexRiscv/src/test/cpp/raw/fpu/src/ld @@ -0,0 +1,16 @@ +OUTPUT_ARCH( "riscv" ) + +MEMORY { + onChipRam (W!RX)/*(RX)*/ : ORIGIN = 0x80000000, LENGTH = 128K +} + +SECTIONS +{ + + .crt_section : + { + . = ALIGN(4); + *crt.o(.text) + } > onChipRam + +} |