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authorFriedrich Beckmann <friedrich.beckmann@hs-augsburg.de>2024-03-07 12:26:41 +0100
committerFriedrich Beckmann <friedrich.beckmann@hs-augsburg.de>2024-03-07 12:26:41 +0100
commite96efbe9496c8f9718869791fa30e444f42ffb38 (patch)
tree6c8b833d360cecfe349e500e734efa96e264208a /sim
parent1ef4f1f0f06e8ee44c8d153291da229a37c1185d (diff)
add top_shift and simulation
Diffstat (limited to 'sim')
-rw-r--r--sim/makefile128
-rw-r--r--sim/top_shift/makefile9
-rw-r--r--sim/top_shift/makefile.sources4
-rw-r--r--sim/top_shift/view_signals.gtkw34
4 files changed, 175 insertions, 0 deletions
diff --git a/sim/makefile b/sim/makefile
new file mode 100644
index 0000000..9eb77b1
--- /dev/null
+++ b/sim/makefile
@@ -0,0 +1,128 @@
+## ----------------------------------------------------------------------------
+## Script : makefile
+## ----------------------------------------------------------------------------
+## Author(s) : Johann Faerber, Friedrich Beckmann
+## Company : University of Applied Sciences Augsburg
+## ----------------------------------------------------------------------------
+## Description: This makefile allows automating design flow with ModelSim,
+## it is based on a design directory structure shown at
+## the end of this file.
+## ----------------------------------------------------------------------------
+
+GHDL_CMD = ghdl
+GHDL_OPTIONS = --std=08 --workdir=work
+LOG_FILE = ghdl.log
+
+ECHO_TARGET := echo "$$@" >> $(LOG_FILE) 2>&1
+TIME_STAMP := echo "$$@ $$(date --iso=seconds)"
+TIME_STAMP_LOG_FILE := echo "$$@ $$(date --iso=seconds)" >> $(LOG_FILE) 2>&1
+
+###################################################################
+# Main Targets
+#
+###################################################################
+
+#==== Default target - running simulation without drawing waveforms ====#
+.PHONY : sim
+sim : t_$(PROJECT).ghw
+
+#==== WAVEFORM DRAWING ====#
+.PHONY : wave
+wave : t_$(PROJECT).ghw
+ @echo "---- $@" >> $(LOG_FILE) 2>&1
+ @$(TIME_STAMP_LOG_FILE)
+ @gtkwave t_$(PROJECT).ghw view_signals.gtkw >> $(LOG_FILE) 2>&1 &
+
+#==== SIMULATION ====#
+t_$(PROJECT).ghw : .compile.done
+ @echo "---- $@" >> $(LOG_FILE) 2>&1
+ @$(TIME_STAMP_LOG_FILE)
+ @echo "Simulating ..." 2>&1 | tee -a $(LOG_FILE)
+ @$(GHDL_CMD) -r $(GHDL_OPTIONS) t_$(PROJECT) --wave=t_$(PROJECT).ghw >> $(LOG_FILE) 2>&1
+ @$(TIME_STAMP) > .sim.done
+
+#==== COMPILATION ====#
+compile : .compile.done
+
+.compile.done : $(SOURCE_FILES) .gproject.done
+ @echo "---- $@" >> $(LOG_FILE) 2>&1
+ @$(TIME_STAMP_LOG_FILE)
+ @echo "Compiling ..." >> $(LOG_FILE) 2>&1
+ @$(GHDL_CMD) -m $(GHDL_OPTIONS) --warn-default-binding t_$(PROJECT) 2>&1 | tee -a $(LOG_FILE)
+ @$(TIME_STAMP) > .compile.done
+
+#==== PROJECT CREATION ====#
+gproject : .gproject.done
+
+.gproject.done : makefile.sources
+ @echo "---- $@" >> $(LOG_FILE) 2>&1
+ @$(TIME_STAMP_LOG_FILE)
+ @echo "Creating Project ..." >> $(LOG_FILE) 2>&1
+ @rm -rf ./ghdl_sources.tcl
+ @# Create a directory work if it does not exist. Otherwise do nothing.
+ @[ -d work ] || mkdir -p work
+ @$(GHDL_CMD) -i $(GHDL_OPTIONS) $(SOURCE_FILES) 2>&1 | tee -a $(LOG_FILE)
+ @$(TIME_STAMP) > .gproject.done
+
+#==== Synthesis Check ====#
+synthcheck : .compile.done
+ @echo "---- $@" >> $(LOG_FILE) 2>&1
+ @$(TIME_STAMP_LOG_FILE)
+ @echo "Synthesis Check ..." >> $(LOG_FILE) 2>&1
+ @$(GHDL_CMD) --synth --out=none $(GHDL_OPTIONS) $(PROJECT) 2>&1 | tee -a $(LOG_FILE)
+ @$(TIME_STAMP) > .synth.done
+
+warnings: $(LOG_FILE)
+ @echo "---- $@" >> $(LOG_FILE) 2>&1
+ @$(TIME_STAMP_LOG_FILE)
+ @grep "Warning (" $(LOG_FILE)
+
+.PHONY : clean
+clean:
+ @$(GHDL_CMD) --remove; rm -rf work*.cf work *.vcd *.ghw *.log ghdl_sources.tcl .gproject.done .compile.done .sim.done .synth.done
+
+help:
+ @echo 'Default target is sim'
+ @echo ' "make gproject" to create a new ghdl project only'
+ @echo ' "make compile" to compile all VHDL sources in batch mode'
+ @echo ' "make sim" to run ghdl with the top testbench of the project'
+ @echo ' "make wave" to display the simulation results in the time domain'
+ @echo ' "make clean" to remove all generated files'
+
+
+## ----------------------------------------------------------------------------
+## Description:
+## ------------
+## assumes the following design directory structure as prerequisite
+##
+## DigitaltechnikPraktikum
+## |
+## +---src
+## | and2gate_equation.vhd
+## | invgate_equation.vhd
+## | mux2to1_structure.vhd
+## | or2gate_equation.vhd
+## | t_mux2to1.vhd
+## | de1_mux2to1_structure.vhd
+## |
+## +---sim
+## | | makefile
+## | |
+## | \---mux2to1
+## | makefile
+## | makefile.sources
+## |
+## +---pnr
+## | | makefile
+## | |
+## | \---de1_mux2to1
+## | de1_mux2to1_pins.tcl
+## | makefile
+## |
+## \---scripts
+## de1_pin_assignments_minimumio.csv
+## de1_pin_assignments_minimumio.tcl
+## modelsim.ini
+## quartus_project_settings.tcl
+## ----------------------------------------------------------------------------
+
diff --git a/sim/top_shift/makefile b/sim/top_shift/makefile
new file mode 100644
index 0000000..9b0a862
--- /dev/null
+++ b/sim/top_shift/makefile
@@ -0,0 +1,9 @@
+PROJECT = top_shift
+
+# This include must define SYN_SOURCE_FILES
+include ./makefile.sources
+
+SOURCE_FILES = $(SYN_SOURCE_FILES) \
+../../src/t_$(PROJECT).vhd
+
+include ../makefile
diff --git a/sim/top_shift/makefile.sources b/sim/top_shift/makefile.sources
new file mode 100644
index 0000000..460360c
--- /dev/null
+++ b/sim/top_shift/makefile.sources
@@ -0,0 +1,4 @@
+# All files which synthesized
+
+SYN_SOURCE_FILES = \
+../../src/top_shift.vhd
diff --git a/sim/top_shift/view_signals.gtkw b/sim/top_shift/view_signals.gtkw
new file mode 100644
index 0000000..8437be3
--- /dev/null
+++ b/sim/top_shift/view_signals.gtkw
@@ -0,0 +1,34 @@
+[*]
+[*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI
+[*] Wed Mar 6 22:54:48 2024
+[*]
+[dumpfile] "/home/caeuser/projects/dtlab/sim/top_shift/t_top_shift.ghw"
+[dumpfile_mtime] "Wed Mar 6 22:52:36 2024"
+[dumpfile_size] 1314
+[savefile] "/home/caeuser/projects/dtlab/sim/top_shift/view_signals.gtkw"
+[timestart] 0
+[size] 1000 600
+[pos] -1 -1
+*-26.740849 115500000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+[treeopen] top.
+[treeopen] top.t_top_shift.
+[treeopen] top.t_top_shift.dut.
+[sst_width] 245
+[signals_width] 173
+[sst_expanded] 1
+[sst_vpaned_height] 185
+@28
+top.t_top_shift.dut.clk
+top.t_top_shift.dut.rst_n
+top.t_top_shift.dut.x
+@800028
+#{top.t_top_shift.dut.sr[0:1]} top.t_top_shift.dut.sr[0] top.t_top_shift.dut.sr[1]
+@28
+top.t_top_shift.dut.sr[0]
+top.t_top_shift.dut.sr[1]
+@1001200
+-group_end
+@29
+top.t_top_shift.dut.y
+[pattern_trace] 1
+[pattern_trace] 0