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diff --git a/README.md b/README.md new file mode 100644 index 0000000..81f493b --- /dev/null +++ b/README.md @@ -0,0 +1,46 @@ +#### eboard - a SoC board with GbE Ethernet for VexiiRiscV #### + +This repository contains the KiCad design files für a Lattice +FPGA board with GbE Ethernet interface for an SoC course. The +board has the following features + + - Lattice ECP5 FPGA + - WCH CH347 based JTAG/UART programmer + - USB-C connector for programming and serial interface + - 32 MB SDRAM + - 10 Switches, 4 Push-Buttons + - 16 LEDs (10 red, 6 green) + - 4 HEX Displays + - HDMI Output + - Expansion Port + - 2 x Pmod ports + - Powered over USB + - Robust mechanical setup + +### Motivation / Use Cases / Requirements ### + +The board is the result of running digital design courses for many +years. I like the Terasic DE1 board very much. We have about 80 boards +in the library available for students to use them directly. The board +must allow very simple fpga experiments with switches and leds. + +The DE1 board unfortunately does not have an ethernet interface. So it is +difficult to show high speed data processing. For SoC this becomes +a real pain. So this board has ethernet. + +The DE1 board has a simple VGA with resistor based DAC. That was nice but +it is difficult to have VGA monitors. So I switched to HDMI. + +The board should not cost more than 100 Euro. + +The board should be manufacturable at JLCPCB including assembly. + +The board must have expansion port possibilites at least for low +speed extensions. With the ECP5 a 40GbE port is not possible as +the fpga does not have serdes at 10 Gigabit. + +### License ### + +The hardware design files are licensed under CERN-OHL-S-2.0. The +software under GPL-3.0-or-later. All documents are licensed under +CC-BY-SA-4.0.
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