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authorFriedrich Beckmann <friedrich.beckmann@hs-augsburg.de>2025-03-18 14:07:33 +0100
committerFriedrich Beckmann <friedrich.beckmann@hs-augsburg.de>2025-03-18 14:07:33 +0100
commit2c9c738d217c80a235c82f830a72223e07c9c4d5 (patch)
tree131682713b36bbf25a59fcbd68604df5b47b1110 /pnr/de1_dac/de1_dac_special.sdc
parent0408ead89eb3da768b5d0cb202127fd527c933c4 (diff)
add de1_dacHEADmaster
Diffstat (limited to 'pnr/de1_dac/de1_dac_special.sdc')
-rw-r--r--pnr/de1_dac/de1_dac_special.sdc21
1 files changed, 21 insertions, 0 deletions
diff --git a/pnr/de1_dac/de1_dac_special.sdc b/pnr/de1_dac/de1_dac_special.sdc
new file mode 100644
index 0000000..17260a6
--- /dev/null
+++ b/pnr/de1_dac/de1_dac_special.sdc
@@ -0,0 +1,21 @@
+create_clock -period 20.000 -name CLOCK_50 [get_ports CLOCK_50]
+
+set default_inputs [get_ports KEY0]
+set default_inputs [add_to_collection $default_inputs [get_ports ADC_OTR*]]
+
+# Some clock for ADC/DAC Board
+set clock_outputs [get_ports ADC_CLK*]
+set clock_outputs [add_to_collection $clock_outputs [get_ports DAC_CLK*]]
+set clock_outputs [add_to_collection $clock_outputs [get_ports DAC_WRT*]]
+
+set default_outputs [remove_from_collection [all_outputs] [get_ports DAC_D*]]
+set default_outputs [remove_from_collection $default_outputs $clock_outputs]
+
+# Default Timing Constrains for Inputs/Outputs
+set_input_delay -clock CLOCK_50 5 $default_inputs
+set_output_delay -clock CLOCK_50 5 $default_outputs
+# Special Timing for ADC and DAC Data I/O
+set_input_delay -clock CLOCK_50 17 [get_ports ADC_D*]
+set_output_delay -clock CLOCK_50 -clock_fall 7 [get_ports DAC_D*]
+# Special Timing for clock outputs
+set_output_delay -clock CLOCK_50 2 $clock_outputs