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authorJohann Faerber <johann.faerber@hs-augsburg.de>2022-03-13 16:07:05 +0100
committerJohann Faerber <johann.faerber@hs-augsburg.de>2022-03-13 16:07:05 +0100
commit16fb5e54b5486e20facbd720b62f21521e3417cf (patch)
tree8e7e3d0d7353728154ce0cd144da89b72972accd /sim/pwm/makefile.sources
parentde2f6cd37b8906f63bc5e007339aa40fc409ba2f (diff)
removed sim/pwm and pnr/de1_pwm
Diffstat (limited to 'sim/pwm/makefile.sources')
-rw-r--r--sim/pwm/makefile.sources17
1 files changed, 0 insertions, 17 deletions
diff --git a/sim/pwm/makefile.sources b/sim/pwm/makefile.sources
deleted file mode 100644
index 5db2028..0000000
--- a/sim/pwm/makefile.sources
+++ /dev/null
@@ -1,17 +0,0 @@
-## ----------------------------------------------------------------------------
-## Script : makefile.sources
-## ----------------------------------------------------------------------------
-## Author : Johann Faerber
-## Company : University of Applied Sciences Augsburg
-## ----------------------------------------------------------------------------
-## Description: provide all the VHDL source files in the variable SYN_SOURCE_FILES
-## Attention !!!
-## -------------
-## Do not forget a new line after the final source file !
-## ----------------------------------------------------------------------------
-
-SYN_SOURCE_FILES = \
-../../src/pwm_rtl.vhd \
-
-# do not delete this line
-# -----------------------------------------------------------------------------