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authorMatthias Kamuf <matthias.kamuf@hs-augsburg.de>2022-05-04 14:56:11 +0200
committerMatthias Kamuf <matthias.kamuf@hs-augsburg.de>2022-05-04 14:56:11 +0200
commit1d5a8634e3a54bbcd2e6ac3074e6c38f085feef0 (patch)
tree0e8ccbdac9b3f9486b50d4a97ac8147c19156015 /sim/fir/makefile.sources
parentf37b864e1b943984739931b0950c45c6f705c679 (diff)
Added source files for simple FIR filter
Diffstat (limited to 'sim/fir/makefile.sources')
-rwxr-xr-xsim/fir/makefile.sources18
1 files changed, 18 insertions, 0 deletions
diff --git a/sim/fir/makefile.sources b/sim/fir/makefile.sources
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+## ----------------------------------------------------------------------------
+## Script : makefile.sources
+## ----------------------------------------------------------------------------
+## Author : Johann Faerber
+## Company : University of Applied Sciences Augsburg
+## ----------------------------------------------------------------------------
+## Description: provide all the VHDL source files in the variable SYN_SOURCE_FILES
+## Attention !!!
+## -------------
+## Do not forget a new line after the final source file !
+## ----------------------------------------------------------------------------
+
+SYN_SOURCE_FILES = \
+../../src/fir_mac_rtl.vhd \
+../../src/fir_structure.vhd \
+
+# do not delete this line
+# -----------------------------------------------------------------------------