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2025-03-18add de1_dacHEADmasterFriedrich Beckmann
2025-03-18add de1_ledswFriedrich Beckmann
2023-04-17added de1_adcFriedrich Beckmann
2023-03-15added de1_sine sinewave generator for ADC/DAC boardFriedrich Beckmann
I added a sinewave generator based on DDS in VHDL to generate a sinewave with the ADC/DAC board. This can be used to demonstrate the Aliasing Lowpass filter.
2022-06-15Created stub for DDS test with ADDA-board using Simulink flowMatthias Kamuf
2022-05-16add / update de1_sta codeFriedrich Beckmann
I modified the de1_sta demo code and added a testbench.
2022-05-16Added FIR design files for DE1 top levelMatthias Kamuf
2022-05-04Added source files for simple FIR filterMatthias Kamuf
2022-03-16added t_and2gate.vhd and de1_and2gate_structure.vhdJohann Faerber
2022-03-13deleted equation within invgate_equation.vhdJohann Faerber
2022-03-09added basic design directory structureJohann Faerber